Petrarca; Kevin Shawn

Patent Applications and Registrations

Patent applications and USPTO patent grants for Petrarca; Kevin Shawn.The latest application filed is for "create a protected layer for interconnects and devices in a packaged quantum structure".

Company Profile

0.15.17

Petrarca; Kevin Shawn - Newburgh NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Create A Protected Layer For Interconnects And Devices In A Packaged Quantum Structure App 20220189922 - Abraham; David ; et al.	2022-06-16
Layered Substrate Structures With Aligned Optical Access To Electrical Devices App 20220158068 - Gates; Stephen M. ; et al.	2022-05-19
Low Temperature Bi-cmos Compatible Process For Mems Rf Resonators And Filters App 20120270351 - BUCHWALTER; Leena Paivikki ; et al.	2012-10-25
Low temperature Bi-CMOS compatible process for MEMS RF resonators and filters Grant 7,943,412 - Buchwalter , et al. May 17, 2	2011-05-17
Low Temperature BI-CMOS Compatible Process For MEMS RF Resonators and Filters App 20110109405 - Buchwalter; Leena Paivikki ; et al.	2011-05-12
Method of making a sidewall-protected metallic pillar on a semiconductor substrate Grant 7,855,137 - Farooq , et al. December 21, 2	2010-12-21
Method for forming conductive structures Grant 7,833,893 - Grunow , et al. November 16, 2	2010-11-16
Structures and methods for reduction of parasitic capacitances in semiconductor integrated circuits Grant 7,825,019 - Clevenger , et al. November 2, 2	2010-11-02
Method Of Making A Sidewall-protected Metallic Pillar On A Semiconductor Substrate App 20100038777 - Farooq; Mukta G. ; et al.	2010-02-18
Stress relaxation, selective nitride phase removal Grant 7,541,277 - Petrarca , et al. June 2, 2	2009-06-02
Seedless wirebond pad plating Grant 7,534,651 - Narayan , et al. May 19, 2	2009-05-19
Low temperature bi-CMOS compatible process for MEMS RF resonators and filters App 20090108381 - Buchwalter; Leena Paivikki ; et al.	2009-04-30
Structures And Methods For Reduction Of Parasitic Capacitances In Semiconductor Integrated Circuits App 20090085210 - Clevenger; Lawrence A. ; et al.	2009-04-02
Method For Forming Conductive Structures App 20090017616 - Grunow; Stephan ; et al.	2009-01-15
Internally reinforced bond pads Grant 7,273,804 - Angell , et al. September 25, 2	2007-09-25
Seedless wirebond pad plating App 20070007659 - Narayan; Chandrasekhar ; et al.	2007-01-11
Seedless wirebond pad plating Grant 7,115,997 - Narayan , et al. October 3, 2	2006-10-03
Wedgebond pads having a nonplanar surface structure Grant 6,982,493 - Petrarca , et al. January 3, 2	2006-01-03
Internally reinforced bond pads App 20050121803 - Angell, David ; et al.	2005-06-09
Seedless Wirebond Pad Plating App 20050104217 - Narayan, Chandrasekhar ; et al.	2005-05-19
Internally reinforced bond pads Grant 6,864,578 - Angell , et al. March 8, 2	2005-03-08
High density area array solder microjoining interconnect structure and fabrication method Grant 6,819,000 - Magerlein , et al. November 16, 2	2004-11-16
Internally reinforced bond pads App 20040195642 - Angell, David ; et al.	2004-10-07
Wedgebond Pads Having A Nonplanar Surface Structure App 20040195679 - Petrarca, Kevin Shawn ; et al.	2004-10-07
Temporary device attach structure for test and burn in of microjoint interconnects and method for fabricating the same Grant 6,747,472 - Magerlein , et al. June 8, 2	2004-06-08
High density raised stud microjoining system and methods of fabricating the same Grant 6,732,908 - Furman , et al. May 11, 2	2004-05-11
High density area array solder microjoining interconnect structure and fabrication method App 20040084782 - Magerlein, John Harold ; et al.	2004-05-06
High density area array solder microjoining interconnect structure and fabrication method Grant 6,661,098 - Magerlein , et al. December 9, 2	2003-12-09
Temporary device attach structure for test and burn in of microjoint interconnects and method for fabricating the same App 20030136813 - Magerlein, John Harold ; et al.	2003-07-24
High density raised stud microjoining system and methods of fabricating the same App 20030136814 - Furman, Bruce Kenneth ; et al.	2003-07-24
High density area array solder microjoining interconnect structure and fabrication method App 20030137058 - Magerlein, John Harold ; et al.	2003-07-24
Method of producing heat dissipating structure for semiconductor devices Grant 6,284,574 - Petrarca , et al. September 4, 2	2001-09-04

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.