Peters; Arthur

Patent Applications and Registrations

Patent applications and USPTO patent grants for Peters; Arthur.The latest application filed is for "multiprocessor system with centralized initialization, testing and monitoring of the system and providing centralized timing".

Company Profile

0.14.0

Peters; Arthur - Sudbury MA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Multiprocessor system with centralized initialization, testing and monitoring of the system and providing centralized timing Grant 5,274,797 - Barlow , et al. December 28, 1	1993-12-28
Bus monitor with time stamp means for independently capturing and correlating events Grant 5,226,153 - DeAngelis , et al. July 6, 1	1993-07-06
Bus monitor with selective capture of independently occuring events from multiple sources Grant 5,210,862 - DeAngelis , et al. May 11, 1	1993-05-11
Bus monitor with means for selectively capturing trigger conditions Grant 5,206,948 - De Angelis , et al. April 27, 1	1993-04-27
Bus monitor with dual port memory for storing selectable trigger patterns Grant 5,142,673 - De Angelis , et al. August 25, 1	1992-08-25
FIFO buffer to cache memory Grant 4,494,190 - Peters January 15, 1	1985-01-15
Data steering logic for the output of a cache memory having an odd/even bank structure Grant 4,445,172 - Peters , et al. April 24, 1	1984-04-24
Odd/even bank structure for a cache memory Grant 4,424,561 - Stanley , et al. January 3, 1	1984-01-03
Diagnostic subsystem for a cache memory Grant 4,392,201 - Brown , et al. July 5, 1	1983-07-05
Hit/miss logic for a cache memory Grant 4,363,095 - Woods , et al. December 7, 1	1982-12-07
Local bus interface for controlling information transfers between units in a central subsystem Grant 4,323,967 - Peters , et al. April 6, 1	1982-04-06
Self-evaluation system for determining the operational integrity of a data processing system Grant 4,322,846 - Carroll , et al. March 30, 1	1982-03-30
Apparatus and method for next address generation in a data processing system Grant 4,309,753 - Negi , et al. January 5, 1	1982-01-05
Binary coded decimal correction apparatus for use in an arithmetic unit of a data processing unit Grant 4,245,328 - Negi , et al. January 13, 1	1981-01-13

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