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Patent applications and USPTO patent grants for Perry; Patrick E..The latest application filed is for "memory test with in-line error correction code logic".
Patent | Date |
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Memory test with in-line error correction code logic to test memory data and test the error correction code logic surrounding the memories Grant 9,734,920 - Gorman , et al. August 15, 2 | 2017-08-15 |
Memory Test With In-line Error Correction Code Logic App 20160019981 - GORMAN; Kevin W. ;   et al. | 2016-01-21 |
Memory test with in-line error correction code logic Grant 9,224,503 - Gorman , et al. December 29, 2 | 2015-12-29 |
Memory Test With In-line Error Correction Code Logic App 20140143619 - GORMAN; Kevin W. ;   et al. | 2014-05-22 |
Design Structure For Adaptive Route Planning For Gps-based Navigation App 20080215237 - Perry; Patrick E. | 2008-09-04 |
Adaptive Route Planning For Gps-based Navigation App 20070271034 - Perry; Patrick E. | 2007-11-22 |
In-line code suppression Grant 6,880,074 - Perry , et al. April 12, 2 | 2005-04-12 |
Low-power critical error rate communications controller Grant 6,802,033 - Bertin , et al. October 5, 2 | 2004-10-05 |
Real time function view system and method Grant 6,678,847 - Perry , et al. January 13, 2 | 2004-01-13 |
In-line code suppression App 20020103992 - Perry, Patrick E. ;   et al. | 2002-08-01 |
Wiring layout design method and system for integrated circuits Grant 5,341,310 - Gould , et al. August 23, 1 | 1994-08-23 |
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