| Patent | Date |
|---|
Apparatus and methods for on-die temperature sensing to improve FPGA performance
Grant 10,200,037 - Perisetty Fe | 2019-02-05 |
Apparatus And Methods For On-die Temperature Sensing To Improve Fpga Performance
App 20170373690 - Perisetty; Srinivas | 2017-12-28 |
Apparatus and methods for on-die temperature sensing to improve FPGA performance
Grant 9,735,779 - Perisetty August 15, 2 | 2017-08-15 |
Integrated circuits with asymmetric and stacked transistors
Grant 9,496,268 - Liu , et al. November 15, 2 | 2016-11-15 |
Integrated Circuits with Asymmetric and Stacked Transistors
App 20160232952 - Liu; Jun ; et al. | 2016-08-11 |
Integrated Circuits with Asymmetric and Stacked Transistors
App 20150318029 - Liu; Jun ; et al. | 2015-11-05 |
Apparatus And Methods For Power Management In Integrated Circuits
App 20140258956 - Lewis; David ; et al. | 2014-09-11 |
Integrated circuits with asymmetric and stacked transistors
Grant 8,750,026 - Liu , et al. June 10, 2 | 2014-06-10 |
Apparatus and methods for power management in integrated circuits
Grant 8,732,635 - Lewis , et al. May 20, 2 | 2014-05-20 |
Memory elements with increased write margin and soft error upset immunity
Grant 8,711,614 - Lee , et al. April 29, 2 | 2014-04-29 |
Self-biased voltage regulation circuitry for memory
Grant 8,618,786 - Perisetty , et al. December 31, 2 | 2013-12-31 |
Self-biased voltage regulation circuitry for memory
Grant 08618786 - | 2013-12-31 |
Integrated circuits with asymmetric and stacked transistors
Grant 8,482,963 - Liu , et al. July 9, 2 | 2013-07-09 |
Memory elements with voltage overstress protection
Grant 8,369,175 - Liu , et al. February 5, 2 | 2013-02-05 |
Static random-access memory with boosted voltages
Grant 8,279,660 - Perisetty October 2, 2 | 2012-10-02 |
Performance improvements in an integrated circuit by selectively applying forward bias voltages
Grant 8,099,704 - Perisetty January 17, 2 | 2012-01-17 |
Static Random-access Memory With Boosted Voltages
App 20110211384 - Perisetty; Srinivas | 2011-09-01 |
Electrostatic discharge protection in a field programmable gate array
Grant 7,990,664 - Perisetty , et al. August 2, 2 | 2011-08-02 |
Electrostatic discharge protection circuitry
Grant 7,978,450 - Perisetty July 12, 2 | 2011-07-12 |
Static random-access memory with boosted voltages
Grant 7,957,177 - Perisetty June 7, 2 | 2011-06-07 |
Memory elements with increased write margin and soft error upset immunity
Grant 7,920,410 - Lee , et al. April 5, 2 | 2011-04-05 |
Variable-output current-load-independent negative-voltage regulator
Grant 7,863,968 - Perisetty January 4, 2 | 2011-01-04 |
Method and apparatus for providing electrostatic discharge protection for a polysilicon fuse
Grant 7,782,581 - Perisetty August 24, 2 | 2010-08-24 |
Integrated circuits with adjustable body bias and power supply circuitry
Grant 7,675,317 - Perisetty March 9, 2 | 2010-03-09 |
Integrated circuit voltage regulator
Grant 7,639,067 - Perisetty December 29, 2 | 2009-12-29 |
Hotsocket-compatible body bias circuitry with power-up current reduction capabilities
Grant 7,639,041 - Perisetty December 29, 2 | 2009-12-29 |
Static Random-access Memory With Boosted Voltages
App 20090303826 - Perisetty; Srinivas | 2009-12-10 |
Booster circuit with capacitor protection circuitry
Grant 7,629,831 - Perisetty , et al. December 8, 2 | 2009-12-08 |
Adjustable transistor body bias circuitry
Grant 7,592,832 - Perisetty September 22, 2 | 2009-09-22 |
Testing circuitry for programmable logic devices with selectable power supply voltages
Grant 7,571,413 - Ghosh Dastidar , et al. August 4, 2 | 2009-08-04 |
Adjustable transistor body bias generation circuitry with latch-up prevention
Grant 7,514,953 - Perisetty April 7, 2 | 2009-04-07 |
ESD protection structure
Grant 7,511,932 - Gallerano , et al. March 31, 2 | 2009-03-31 |
Integrated circuits with adjustable body bias and power supply circuitry
App 20090072857 - Perisetty; Srinivas | 2009-03-19 |
Varactor-based charge pump
App 20090072891 - Perisetty; Srinivas | 2009-03-19 |
Latch-up prevention circuitry for integrated circuits with transistor body biasing
Grant 7,501,849 - Perisetty March 10, 2 | 2009-03-10 |
Adjustable transistor body bias circuitry
Grant 7,495,471 - Perisetty February 24, 2 | 2009-02-24 |
Adjustable Transistor Body Bias Circuitry
App 20080258802 - Perisetty; Srinivas | 2008-10-23 |
Apparatus And Methods For Power Management In Integrated Circuits
App 20080263481 - Lewis; David ; et al. | 2008-10-23 |
Apparatus and methods for power management in integrated circuits
Grant 7,405,589 - Lewis , et al. July 29, 2 | 2008-07-29 |
Latch-up Prevention Circuitry For Integrated Circuits With Transistor Body Biasing
App 20080150575 - Perisetty; Srinivas | 2008-06-26 |
Adjustable Transistor Body Bias Generation Circuitry With Latch-up Prevention
App 20080094100 - Perisetty; Srinivas | 2008-04-24 |
Latch-up prevention circuitry for integrated circuits with transistor body biasing
Grant 7,355,437 - Perisetty April 8, 2 | 2008-04-08 |
Adjustable transistor body bias generation circuitry with latch-up prevention
Grant 7,330,049 - Perisetty February 12, 2 | 2008-02-12 |
Redundant column read in a memory array
Grant 7,296,196 - Perisetty November 13, 2 | 2007-11-13 |
Adjustable Transistor Body Bias Generation Circuitry With Latch-up Prevention
App 20070205802 - Perisetty; Srinivas | 2007-09-06 |
Adjustable transistor body bias circuitry
App 20070205824 - Perisetty; Srinivas | 2007-09-06 |
Latch-up prevention circuitry for integrated circuits with transistor body biasing
App 20070205801 - Perisetty; Srinivas | 2007-09-06 |
Apparatus and methods for power management in integrated circuits
App 20070040576 - Lewis; David ; et al. | 2007-02-22 |
Redundant column read in a memory array
App 20070022330 - Perisetty; Srinivas | 2007-01-25 |
Approach for zero dummy byte flash memory read operation
Grant 6,879,535 - Perisetty April 12, 2 | 2005-04-12 |
| 