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Patent applications and USPTO patent grants for Periasamy; Ganesh Vetrivel.The latest application filed is for "system and method for an electronic package with a fail-open mechanism".
Patent | Date |
---|---|
System and method for an electronic package with a fail-open mechanism Grant 8,816,390 - Marbella , et al. August 26, 2 | 2014-08-26 |
System And Method For An Electronic Package With A Fail-open Mechanism App 20130194752 - Marbella; Carlo Baterna ;   et al. | 2013-08-01 |
RF and MMIC stackable micro-modules Grant 7,592,703 - Kripesh , et al. September 22, 2 | 2009-09-22 |
RF and MMIC stackable micro-modules App 20070222083 - Kripesh; Vaidyanathan ;   et al. | 2007-09-27 |
RF and MMIC stackable micro-modules Grant 7,230,318 - Kripesh , et al. June 12, 2 | 2007-06-12 |
Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra-low k devices Grant 7,160,756 - Kripesh , et al. January 9, 2 | 2007-01-09 |
Method for ultra thinning bumped wafers for flip chip Grant 7,141,487 - Periasamy , et al. November 28, 2 | 2006-11-28 |
Polymer encapsulated dicing lane (PEDL) technology for Cu/low/ultra-low k devices App 20060079025 - Kripesh; Vaidyanathan ;   et al. | 2006-04-13 |
Method for ultra thinning bumped wafers for flip chip App 20060003550 - Periasamy; Ganesh Vetrivel ;   et al. | 2006-01-05 |
RF and MMIC stackable micro-modules App 20050146049 - Kripesh, Vaidyanathan ;   et al. | 2005-07-07 |
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