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Patent applications and USPTO patent grants for Percey; Andrew K..The latest application filed is for "synchronized multi-output digital clock manager".
Patent | Date |
---|---|
Synchronized multi-output digital clock manager Grant 7,187,742 - Logue , et al. March 6, 2 | 2007-03-06 |
Multi-speed delay-locked loop Grant 7,098,710 - New , et al. August 29, 2 | 2006-08-29 |
Phase matched clock divider Grant 7,046,052 - Percey , et al. May 16, 2 | 2006-05-16 |
Digital spread spectrum circuitry Grant 7,010,014 - Percey , et al. March 7, 2 | 2006-03-07 |
Method and apparatus for clock signal performance measurement Grant 6,983,394 - Morrison , et al. January 3, 2 | 2006-01-03 |
Digital phase shifter Grant 6,775,342 - Young , et al. August 10, 2 | 2004-08-10 |
Glitchless delay line using gray code multiplexer Grant 6,400,735 - Percey June 4, 2 | 2002-06-04 |
Input/output interconnect circuit for FPGAs Grant 6,204,689 - Percey , et al. March 20, 2 | 2001-03-20 |
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