Percer; Benjamin Thomas

Patent Applications and Registrations

Patent applications and USPTO patent grants for Percer; Benjamin Thomas.The latest application filed is for "integrated margin testing".

Company Profile

0.4.6

Percer; Benjamin Thomas - Roseville CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated Margin Testing App 20090119052 - ROBERTSON; Naysen Jesse ; et al.	2009-05-07
Method and construct for enabling programmable, integrated system margin testing Grant 7,493,226 - Robertson , et al. February 17, 2	2009-02-17
Use of I2C programmable clock generator to enable frequency variation under BMC control Grant 7,437,258 - Robertson , et al. October 14, 2	2008-10-14
Use of I.sup.2C-based potentiometers to enable voltage rail variation under BMC control Grant 7,400,996 - Percer , et al. July 15, 2	2008-07-15
Computer data bus interface control Grant 7,174,470 - Percer , et al. February 6, 2	2007-02-06
Computer data bus interface control App 20050077921 - Percer, Benjamin Thomas ; et al.	2005-04-14
Use of I2C programmable clock generator to enable frequency variation under BMC control App 20050021260 - Robertson, Naysen Jesse ; et al.	2005-01-27
Methods and systems for masking faults in a margin testing environment App 20040267483 - Percer, Benjamin Thomas ; et al.	2004-12-30
Method and construct for enabling programmable, integrated system margin testing App 20040267482 - Robertson, Naysen Jesse ; et al.	2004-12-30
Use of I2C-based potentiometers to enable voltage rail variation under BMC control App 20040267486 - Percer, Benjamin Thomas ; et al.	2004-12-30

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