| Patent | Date |
|---|
Calibration Scheme For A Non-linear Adc
App 20220224349 - Varshney; Himanshu ; et al. | 2022-07-14 |
Pipeline ADC and reference load balancing circuit and method to balance reference circuit load
Grant 9,748,965 - Francis , et al. August 29, 2 | 2017-08-29 |
Pipeline Adc And Reference Load Balancing Circuit And Method To Balance Reference Circuit Load
App 20160072518 - Francis; Roswald ; et al. | 2016-03-10 |
Source follower input buffer
Grant 8,581,634 - Agarwal , et al. November 12, 2 | 2013-11-12 |
Low power clocking scheme for a pipelined ADC
Grant 8,217,691 - Pentakota July 10, 2 | 2012-07-10 |
High Speed Switched Capacitor Reference Buffer
App 20120049951 - Venkataraman; Jagannathan ; et al. | 2012-03-01 |
Source Follower Input Buffer
App 20110204930 - Agarwal; Nitin ; et al. | 2011-08-25 |
Apparatus for correcting setting error in an MDAC amplifier
Grant 7,969,334 - Kiran , et al. June 28, 2 | 2011-06-28 |
Multibit recyclic pipelined ADC architecture
Grant 7,948,410 - Venkataraman , et al. May 24, 2 | 2011-05-24 |
Low Power Clocking Scheme For A Pipelined Adc
App 20110102033 - Pentakota; Visvesvaraya A. | 2011-05-05 |
Apparatus For Correcting Setting Error In An Mdac Amplifier
App 20110102216 - Kiran; Ganesh ; et al. | 2011-05-05 |
Correction of sampling mismatch in time-interleaved analog-to-digital converters
Grant 7,898,446 - Nagarajan , et al. March 1, 2 | 2011-03-01 |
Multibit Recyclic Pipelined Adc Architecture
App 20110012764 - Venkataraman; Jagannathan ; et al. | 2011-01-20 |
Correction Of Sampling Mismatch In Time-interleaved Analog-to-digital Converters
App 20100309033 - Nagarajan; Viswanathan ; et al. | 2010-12-09 |
Correcting offset errors associated with a sub-ADC in pipeline analog to digital converters
Grant 7,595,744 - Agarwal , et al. September 29, 2 | 2009-09-29 |
Correcting Offset Errors Associated With A Sub-ADC In Pipeline Analog To Digital Converters
App 20090135037 - Agarwal; Nitin ; et al. | 2009-05-28 |
Generating multiple delayed signals of different phases from a reference signal using delay locked loop (DLL)
Grant 7,479,816 - Lee , et al. January 20, 2 | 2009-01-20 |
Reducing noise and/or power consumption in a switched capacitor amplifier sampling a reference voltage
Grant 7,358,801 - Perdoor , et al. April 15, 2 | 2008-04-15 |
Reducing the time to convert an analog input sample to a digital code in an analog to digital converter (ADC)
Grant 7,310,058 - Udupa , et al. December 18, 2 | 2007-12-18 |
Clamping circuit
Grant 7,259,609 - Pentakota , et al. August 21, 2 | 2007-08-21 |
Reducing variation in reference voltage when the load varies dynamically
Grant 7,209,060 - Kumar , et al. April 24, 2 | 2007-04-24 |
Reducing Variation in Reference Voltage When the Load Varies Dynamically
App 20070024485 - Kumar; Abhaya ; et al. | 2007-02-01 |
Reducing the Time to Convert an Analog Input Sample to a Digital Code in an analog to digital converter (ADC)
App 20070013569 - Udupa; Anand Hariraj ; et al. | 2007-01-18 |
Multi-stage analog to digital converter architecture
Grant 7,161,521 - Nandi , et al. January 9, 2 | 2007-01-09 |
Low noise output buffer
Grant 7,129,740 - Pentakota , et al. October 31, 2 | 2006-10-31 |
Reducing the effect of noise present along with an input signal when sampling the input signal
Grant 7,113,117 - Pentakota , et al. September 26, 2 | 2006-09-26 |
Providing reference voltage with desired accuracy in a short duration to a dynamically varying load
Grant 7,095,356 - Pentakota , et al. August 22, 2 | 2006-08-22 |
Reducing noise in switched capacitor amplifier circuit
Grant 7,088,273 - Perdoor , et al. August 8, 2 | 2006-08-08 |
Enhancing SNR and throughput performance of integrated circuits
Grant 7,088,149 - Udupa , et al. August 8, 2 | 2006-08-08 |
High speed gain amplifier and method in ADCs
Grant 7,042,383 - Mishra , et al. May 9, 2 | 2006-05-09 |
Bandwidth limited sampling circuit of high linearity
Grant 7,015,850 - Ayyagari , et al. March 21, 2 | 2006-03-21 |
Dummy delay line based DLL and method for clocking in pipeline ADC
Grant 6,977,605 - Lee , et al. December 20, 2 | 2005-12-20 |
Minimizing changes in the amplification factor of an amplification circuit during operation
Grant 6,977,547 - Udupa , et al. December 20, 2 | 2005-12-20 |
Applying desired voltage at a node
Grant 6,933,874 - Pentakota August 23, 2 | 2005-08-23 |
Reducing droop in a reference signal provided to ADCs
Grant 6,906,658 - Pentakota , et al. June 14, 2 | 2005-06-14 |
Low noise output buffer
App 20050116737 - Pentakota, Visvesvaraya A. ; et al. | 2005-06-02 |
Minimizing changes in the amplification factor of an amplification circuit during operation
App 20050116772 - Udupa, Anand Hariraj ; et al. | 2005-06-02 |
Enhancing SNR and throughput performance of integrated circuits
App 20050116760 - Udupa, Anand Hariraj ; et al. | 2005-06-02 |
Clamping circuit
App 20050116761 - Pentakota, Visvesvaraya A. ; et al. | 2005-06-02 |
Calibrating Capacitor Mismatch In A Pipeline Adc
App 20050116847 - Pentakota, Visvesvaraya A. ; et al. | 2005-06-02 |
Dummy delay line based DLL and method for clocking in pipeline ADC
App 20050110671 - Lee, Chun Chieh ; et al. | 2005-05-26 |
High Speed Gain Amplifier and Method in ADCs
App 20050110669 - Mishra, Vineet ; et al. | 2005-05-26 |
Applying desired voltage at a node
App 20050104760 - Pentakota, Visvesvaraya A. | 2005-05-19 |
Calibrating capacitor mismatch in a pipeline ADC
Grant 6,891,486 - Pentakota , et al. May 10, 2 | 2005-05-10 |
Reducing Droop In a Reference Signal Provided to ADCs
App 20050046604 - Pentakota, Visvesvaraya A. ; et al. | 2005-03-03 |
Bandwidth Limited Sampling Circuit of High Linearity
App 20050046605 - AYYAGARI, Ravishankar S. ; et al. | 2005-03-03 |
Closed loop amplification with high throughput performance
Grant 6,847,321 - Pentakota , et al. January 25, 2 | 2005-01-25 |
amplifying signals in switched capacitor environments
Grant 6,400,301 - Kulhalli , et al. June 4, 2 | 2002-06-04 |
Amplifying signals in switched capacitor environments
App 20020027453 - Kulhalli, Suhas R. ; et al. | 2002-03-07 |
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