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name:-0.0099849700927734
name:-0.0044488906860352
Peleska; Pavel Patent Filings

Peleska; Pavel

Patent Applications and Registrations

Patent applications and USPTO patent grants for Peleska; Pavel.The latest application filed is for "data rate adaptive link speed".

Company Profile
5.8.14
  • Peleska; Pavel - Graefelfing DE
  • Peleska; Pavel - Grafelfing DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Data rate adaptive link speed configuration for connection between host processor and modem
Grant 10,866,625 - Schneider , et al. December 15, 2
2020-12-15
System, apparatus and method for traffic shaping of data communication via an interconnect
Grant 10,855,600 - Peleska , et al. December 1, 2
2020-12-01
Interprocessor power state transitions
Grant 10,627,886 - Leucht-Roth , et al.
2020-04-21
Data rate-adaptive data transfer between modems and host platforms
Grant 10,509,762 - Peleska , et al. Dec
2019-12-17
Data Rate Adaptive Link Speed
App 20190121417 - Schneider; Reinhold ;   et al.
2019-04-25
System, Apparatus And Method For Traffic Shaping Of Data Communication Via An Interconnect
App 20190081900 - Peleska; Pavel ;   et al.
2019-03-14
Interprocessor Power State Transitions
App 20190064915 - Leucht-Roth; Ulrich ;   et al.
2019-02-28
Data Rate-adaptive Data Transfer Between Modems And Host Platforms
App 20190042522 - Peleska; Pavel ;   et al.
2019-02-07
Interprocessor power state transitions
Grant 9,946,325 - Leucht-Roth , et al. April 17, 2
2018-04-17
Interprocessor Power State Transitions
App 20180004273 - Leucht-Roth; Ulrich ;   et al.
2018-01-04
Method and Device for Insuring Consistent Memory Contents in Redundant Memory Units
App 20080313413 - Hutner; Franz ;   et al.
2008-12-18
Method for synchronizing events, particularly for processors of fault-tolerant systems
App 20060195849 - Peleska; Pavel ;   et al.
2006-08-31
Circuit arrangement and method of a multiprocessor system
App 20060031642 - Maenz; Martin ;   et al.
2006-02-09
System and method for establishing consistent memory contents in redundant systems
Grant 6,959,400 - Peleska October 25, 2
2005-10-25
Method for event synchronisation, especially for processors of fault-tolerant systems
App 20050229035 - Peleska, Pavel ;   et al.
2005-10-13
Method and circuit arrangement for synchronization of synchronously or asynchronously clocked processor units
App 20040193735 - Peleska, Pavel ;   et al.
2004-09-30
Method and arrangement for detecting and correcting line defects
App 20040177289 - Peleska, Pavel
2004-09-09
Bus system for a highly scalable multiprocessor system and method for transmitting information in the bus system
Grant 6,757,766 - Hutner , et al. June 29, 2
2004-06-29
Apparatus for indentifying defects in electronic assemblies
Grant 6,642,733 - Peleska , et al. November 4, 2
2003-11-04
System and method for establishing consistent memory contents in redundant systems
App 20030041220 - Peleska, Pavel
2003-02-27
Method for monitoring consistent memory contents in redundant systems
App 20030041290 - Peleska, Pavel
2003-02-27

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