| Patent | Date |
|---|
Methods and apparatus for address translation functions
Grant 9,400,652 - Barry , et al. July 26, 2 | 2016-07-26 |
Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution
Grant 9,021,236 - Pechanek , et al. April 28, 2 | 2015-04-28 |
Methods and Apparatus for Storing Expanded Width Instructions in a VLIW Memory for Deferred Execution
App 20140173253 - Pechanek; Gerald G. ; et al. | 2014-06-19 |
Manifold Array Processor
App 20130019082 - Pechanek; Gerald G. ; et al. | 2013-01-17 |
System Core for Transferring Data Between an External Device and Memory
App 20130007331 - Pechanek; Gerald G. ; et al. | 2013-01-03 |
Methods and Apparatus for Efficient Complex Long Multiplication and Covariance Matrix Implementation
App 20130007421 - Pechanek; Gerald G. ; et al. | 2013-01-03 |
Methods and Apparatus for Scalable Array Processor Interrupt Detection and Response
App 20120173849 - Barry; Edwin Frank ; et al. | 2012-07-05 |
System Core for Transferring Data Between an External Device and Memory
App 20120124335 - Pechanek; Gerald G. ; et al. | 2012-05-17 |
Efficient Complex Multiplication and Fast Fourier Transform (FFT) Implementation on the ManArray Architecture
App 20110225224 - Pitsianis; Nikos P. ; et al. | 2011-09-15 |
System Core for Transferring Data Between an External Device and Memory
App 20110219210 - Pechanek; Gerald G. ; et al. | 2011-09-08 |
System core for transferring data between an external device and memory
Grant 7,962,667 - Pechanek , et al. June 14, 2 | 2011-06-14 |
Methods and Apparatus for Scalable Array Processor Interrupt Detection and Response
App 20110072250 - Barry; Edwin Frank ; et al. | 2011-03-24 |
Methods and apparatus for efficient complex long multiplication and covariance matrix implementation
App 20100121899 - Pechanek; Gerald G. ; et al. | 2010-05-13 |
System core for transferring data between an external device and memory
App 20090063724 - Pechanek; Gerald G. ; et al. | 2009-03-05 |
Efficient Complex Multiplication and Fast Fourier Transform (FFT) Implementation on the ManArray Architecture
App 20080301414 - Pitsianis; Nikos P. ; et al. | 2008-12-04 |
Methods and Apparatus for Scalable Array Processor Interrupt Detection and Response
App 20080222333 - Barry; Edwin Frank ; et al. | 2008-09-11 |
Methods and Apparatus for Initiating and Resynchronizing Multi-Cycle SIMD Instructions
App 20080133892 - Pechanek; Gerald G. ; et al. | 2008-06-05 |
Methods and Apparatus for a Bit Rake Instruction
App 20080120494 - Marchand; Patrick R. ; et al. | 2008-05-22 |
Manifold Array Processor
App 20080052491 - Pechanek; Gerald G. ; et al. | 2008-02-28 |
Manifold Array Processor
App 20070150698 - Pechanek; Gerald G. ; et al. | 2007-06-28 |
Methods and apparatus for indirect VLIW memory allocation
Grant 7,181,730 - Pitsianis , et al. February 20, 2 | 2007-02-20 |
Methods and apparatus for efficient complex long multiplication and covariance matrix implementation
App 20060224656 - Pechanek; Gerald G. ; et al. | 2006-10-05 |
Methods and apparatus for efficient complex long multiplication and covariance matrix implementation
Grant 7,072,929 - Pechanek , et al. July 4, 2 | 2006-07-04 |
Methods and apparatus for power control in a scalable array of processor elements
Grant 6,965,991 - Marchand , et al. November 15, 2 | 2005-11-15 |
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
Grant 6,954,842 - Drabenstott , et al. October 11, 2 | 2005-10-11 |
Methods and apparatus for power control in a scalable array of processor elements
App 20050223253 - Marchand, Patrick R. ; et al. | 2005-10-06 |
Specifying different type generalized event and action pair in a processor
App 20050125644 - Barry, Edwin F. ; et al. | 2005-06-09 |
Manifold array processor
Grant 6,892,291 - Pechanek , et al. May 10, 2 | 2005-05-10 |
Methods and apparatus for loading a very long instruction word memory
Grant 6,883,088 - Barry , et al. April 19, 2 | 2005-04-19 |
Merged control/process element processor for executing VLIW simplex instructions with SISD control/SIMD process mode bit
Grant 6,874,078 - Pechanek , et al. March 29, 2 | 2005-03-29 |
Methods and apparatus for providing context switching between software tasks with reconfigurable control
Grant 6,868,490 - Barry , et al. March 15, 2 | 2005-03-15 |
Methods and apparatus for scalable array processor interrupt detection and response
App 20050027973 - Barry, Edwin Frank ; et al. | 2005-02-03 |
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
Grant 6,851,041 - Pechanek , et al. February 1, 2 | 2005-02-01 |
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
Grant 6,848,041 - Pechanek , et al. January 25, 2 | 2005-01-25 |
Methods and apparatus for power control in a scalable array of processor elements
Grant 6,845,445 - Marchand , et al. January 18, 2 | 2005-01-18 |
Methods and apparatus for scalable array processor interrupt detection and response
Grant 6,842,811 - Barry , et al. January 11, 2 | 2005-01-11 |
Efficient complex multiplication and fast fourier transform (FFT) implementation on the manarray architecture
Grant 6,839,728 - Pitsianis , et al. January 4, 2 | 2005-01-04 |
Efficient complex multiplication and fast fourier transform (FFT) implementation on the ManArray architecture
App 20040221137 - Pitsianis, Nikos P. ; et al. | 2004-11-04 |
Methods and apparatus for ManArray PE-PE switch control
Grant 6,795,909 - Barry , et al. September 21, 2 | 2004-09-21 |
Manifold array processor
App 20040168040 - Pechanek, Gerald G. ; et al. | 2004-08-26 |
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor
Grant 6,775,766 - Revilla , et al. August 10, 2 | 2004-08-10 |
Methods and apparatus for providing context switching between software tasks with reconfigurable control
App 20040153634 - Barry, Edwin F. ; et al. | 2004-08-05 |
Merged array controller with processing element
App 20040148488 - Pechanek, Gerald G. ; et al. | 2004-07-29 |
Methods and apparatus for manifold array processing
Grant 6,769,056 - Barry , et al. July 27, 2 | 2004-07-27 |
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
Grant 6,760,831 - Drabenstott , et al. July 6, 2 | 2004-07-06 |
Methods and apparatus for efficient cosine transform implementations
Grant 6,754,687 - Kurak, Jr. , et al. June 22, 2 | 2004-06-22 |
Constructing database representing manifold array architecture instruction set for use in support tool code creation
Grant 6,748,517 - Pechanek , et al. June 8, 2 | 2004-06-08 |
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
App 20040107333 - Drabenstott, Thomas L. ; et al. | 2004-06-03 |
Specifying different type generalized event and action pair in a processor
Grant 6,735,690 - Barry , et al. May 11, 2 | 2004-05-11 |
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
App 20040049664 - Drabenstott, Thomas L. ; et al. | 2004-03-11 |
Methods and apparatus for loading a very long instruction word memory
Grant 6,704,857 - Barry , et al. March 9, 2 | 2004-03-09 |
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
App 20040039899 - Drabenstott, Thomas L. ; et al. | 2004-02-26 |
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
App 20030200420 - Pechanek, Gerald G. ; et al. | 2003-10-23 |
Methods and apparatus for initiating and resynchronizing multi-cycle SIMD instructions
Grant 6,622,234 - Pechanek , et al. September 16, 2 | 2003-09-16 |
Merged control/process element processor for executing VLIW simplex instructions with SISD control/SIMD process mode bit
Grant 6,606,699 - Pechanek , et al. August 12, 2 | 2003-08-12 |
Methods and apparatus for instruction addressing in indirect VLIW processors
Grant 6,581,152 - Barry , et al. June 17, 2 | 2003-06-17 |
Efficient Complex Multiplication And Fast Fourier Transform (fft) Implementation On The Manarray Architecture
App 20030088601 - PITSIANIS, NIKOS P. ; et al. | 2003-05-08 |
Methods and apparatus for manifold array processing
App 20030088754 - Barry, Edwin F. ; et al. | 2003-05-08 |
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
Grant 6,557,094 - Pechanek , et al. April 29, 2 | 2003-04-29 |
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
App 20030079109 - Pechanek, Gerald G. ; et al. | 2003-04-24 |
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor
App 20030061473 - Revilla, Juan Guillermo ; et al. | 2003-03-27 |
Methods and apparatus for efficient complex long multiplication and covariance matrix implementation
App 20020169813 - Pechanek, Gerald G. ; et al. | 2002-11-14 |
Methods and apparatus for manifold array processing
Grant 6,470,441 - Pechanek , et al. October 22, 2 | 2002-10-22 |
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
Grant 6,467,036 - Pechanek , et al. October 15, 2 | 2002-10-15 |
Register file indexing methods and apparatus for providing indirect control of register addressing in a VLIW processor
Grant 6,446,190 - Barry , et al. September 3, 2 | 2002-09-03 |
Methods and apparatus for efficient synchronous MIMD operations with iVLIW PE-to-PE communication
Grant 6,446,191 - Pechanek , et al. September 3, 2 | 2002-09-03 |
Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision
Grant 6,430,677 - Pechanek , et al. August 6, 2 | 2002-08-06 |
Methods and apparatus for instruction addressing in indirect VLIW processors
App 20020078320 - Barry, Edwin F. ; et al. | 2002-06-20 |
Methods and apparatus for abbreviated instruction sets adaptable to configurable processor architecture
Grant 6,408,382 - Pechanek , et al. June 18, 2 | 2002-06-18 |
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
App 20020073299 - Pechanek, Gerald G. ; et al. | 2002-06-13 |
Manifold array processor
App 20020069343 - Pechanek, Gerald G. ; et al. | 2002-06-06 |
Accessing tables in memory banks using load and store address generators sharing store read port of compute register file separated from address register file
Grant 6,397,324 - Barry , et al. May 28, 2 | 2002-05-28 |
Methods and apparatus to support conditional execution in a VLIW-based array processor with subword execution
Grant 6,366,999 - Drabenstott , et al. April 2, 2 | 2002-04-02 |
Methods and apparatus for instruction addressing in indirect VLIW processors
Grant 6,356,994 - Barry , et al. March 12, 2 | 2002-03-12 |
Methods and apparatus for indirect VLIW memory allocation
App 20020019910 - Pitsianis, Nikos P. ; et al. | 2002-02-14 |
Methods and apparatus for dynamic instruction controlled reconfiguration register file with extended precision
Grant 6,343,356 - Pechanek , et al. January 29, 2 | 2002-01-29 |
Methods and apparatus for power control in a scalable array of processor elements
App 20020004916 - Marchand, Patrick R. ; et al. | 2002-01-10 |
Manifold array processor
Grant 6,338,129 - Pechanek , et al. January 8, 2 | 2002-01-08 |
Methods and apparatus for loading a very long instruction word memory
App 20020002639 - Barry, Edwin Frank ; et al. | 2002-01-03 |
Methods and apparatus for scalable array processor interrupt detection and response
App 20010049763 - Barry, Edwin Frank ; et al. | 2001-12-06 |
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
Grant 6,321,322 - Pechanek , et al. November 20, 2 | 2001-11-20 |
Merged array controller and processing element
App 20010032303 - Pechanek, Gerald G. ; et al. | 2001-10-18 |
Methods and apparatus for dynamic instruction controlled reconfigurable register file with extended precision
App 20010011342 - Pechanek, Gerald G. ; et al. | 2001-08-02 |
Merged array controller and processing element
Grant 6,219,776 - Pechanek , et al. April 17, 2 | 2001-04-17 |
Methods and apparatus to dynamically reconfigure the instruction pipeline of an indirect very long instruction word scalable processor
Grant 6,216,223 - Revilla , et al. April 10, 2 | 2001-04-10 |
Methods and apparatus for dynamic very long instruction word sub-instruction selection for execution time parallelism in an indirect very long instruction word processor
Grant 6,173,389 - Pechanek , et al. January 9, 2 | 2001-01-09 |
Method and apparatus for manifold array processing
Grant 6,167,502 - Pechanek , et al. December 26, 2 | 2000-12-26 |
Distributed processing array with component processors performing customized interpretation of instructions
Grant 6,128,720 - Pechanek , et al. October 3, 2 | 2000-10-03 |
Manifold array processor
Grant 6,023,753 - Pechanek , et al. February 8, 2 | 2000-02-08 |
Selective processing and routing of results among processors controlled by decoding instructions using mask value derived from instruction tag and processor identifier
Grant 5,682,491 - Pechanek , et al. October 28, 1 | 1997-10-28 |
Array processor communication architecture with broadcast processor instructions
Grant 5,659,785 - Pechanek , et al. August 19, 1 | 1997-08-19 |
Parallel processing system and method using surrogate instructions
Grant 5,649,135 - Pechanek , et al. July 15, 1 | 1997-07-15 |
Triangular scalable neural array processor
Grant 5,617,512 - Pechanek , et al. April 1, 1 | 1997-04-01 |
Processing element for parallel array processor
Grant 5,612,908 - Pechanek , et al. March 18, 1 | 1997-03-18 |
Learning machine synapse processor system apparatus
Grant 5,613,044 - Pechanek , et al. March 18, 1 | 1997-03-18 |
Parallel array processor interconnections
Grant 5,577,262 - Pechanek , et al. November 19, 1 | 1996-11-19 |
Triangular scalable neural array processor
Grant 5,542,026 - Pechanek , et al. July 30, 1 | 1996-07-30 |
Learning machine synapse processor system apparatus
Grant 5,517,596 - Pechanek , et al. May 14, 1 | 1996-05-14 |
Triangular scalable neural array processor
Grant 5,509,106 - Pechanek , et al. April 16, 1 | 1996-04-16 |
SPIN: a sequential pipeline neurocomputer
Grant 5,337,395 - Vassiliadis , et al. August 9, 1 | 1994-08-09 |
Scalable flow virtual learning neurocomputer
Grant 5,329,611 - Pechanek , et al. July 12, 1 | 1994-07-12 |
Pyramid learning architecture neurocomputer
Grant 5,325,464 - Pechanek , et al. June 28, 1 | 1994-06-28 |
Virtual neurocomputer architectures for neural networks
Grant 5,243,688 - Pechanek , et al. September 7, 1 | 1993-09-07 |
Scalable neural array processor and method
Grant 5,148,515 - Vassiliadis , et al. September 15, 1 | 1992-09-15 |
Scalable neural array processor
Grant 5,146,543 - Vassiliadis , et al. September 8, 1 | 1992-09-08 |
Communicating adder tree system for neural array processor
Grant 5,146,420 - Vassiliadis , et al. September 8, 1 | 1992-09-08 |
Orthogonal row-column neural processor
Grant 5,065,339 - Vassiliadis , et al. November 12, 1 | 1991-11-12 |
Apparatus and method for extending a parallel synchronous data and message bus
Grant 4,961,140 - Pechanek , et al. October 2, 1 | 1990-10-02 |
Apparatus and method for prediction of zero arithmetic/logic results
Grant 4,947,359 - Vassiliadis , et al. August 7, 1 | 1990-08-07 |
Data processing system parallel data bus having a single oscillator clocking apparatus
Grant 4,943,984 - Pechanek , et al. July 24, 1 | 1990-07-24 |
Method and apparatus for modified carry-save determination of arithmetic/logic zero results
Grant 4,924,422 - Vassiliadis , et al. May 8, 1 | 1990-05-08 |
Multi-character display controller for text recorder
Grant 4,464,070 - Hanft , et al. August 7, 1 | 1984-08-07 |
Text recorder with automatic word ending
Grant 4,374,625 - Hanft , et al. February 22, 1 | 1983-02-22 |
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