Pearce; Charles Walter
Patent Applications and Registrations
Patent applications and USPTO patent grants for Pearce; Charles Walter.The latest application filed is for "high voltage channel diode".
- Pearce; Charles Walter - Emmaus PA
| Patent | Date |
|---|---|
| High voltage channel diode Grant 8,294,210 - Kocon , et al. October 23, 2 | 2012-10-23 |
| High voltage power integrated circuit Grant 8,288,820 - Kocon , et al. October 16, 2 | 2012-10-16 |
| High Voltage Channel Diode App 20110303976 - KOCON; Christopher Boguslaw ; et al. | 2011-12-15 |
| High Voltage Power Integrated Circuit App 20100315159 - Kocon; Christopher Boguslaw ; et al. | 2010-12-16 |
| Mosfet Device Having Dual Interlevel Dielectric Thickness And Method Of Making Same App 20090267145 - Pearce; Charles Walter ; et al. | 2009-10-29 |
| LDMOS device having a tapered oxide Grant 6,762,457 - Pearce , et al. July 13, 2 | 2004-07-13 |
| Use of selective oxidation to improve LDMOS power transistors App 20030100165 - Pearce, Charles Walter ; et al. | 2003-05-29 |
| Oxide etch Grant 6,503,841 - Criscuolo , et al. January 7, 2 | 2003-01-07 |
| Trench Capacitors In Soi Substrstes App 20020094653 - Chittipeddi, Sailesh ; et al. | 2002-07-18 |
| Oxidation Of Silicon Using Fluorine Implants App 20020001972 - PEARCE, CHARLES WALTER ; et al. | 2002-01-03 |
| Semiconductor device structure including a tantalum pentoxide layer sandwiched between silicon nitride layers App 20010029068 - Chittipeddi, Sailesh ; et al. | 2001-10-11 |
| Semiconductor device structure including a tantalum pentoxide layer sandwiched between silicon nitride layers Grant 6,294,807 - Chittipeddi , et al. September 25, 2 | 2001-09-25 |
| Method to selectively heat semiconductor wafers Grant 6,245,692 - Pearce , et al. June 12, 2 | 2001-06-12 |
| Method of etching silicon materials Grant 5,930,650 - Chung , et al. July 27, 1 | 1999-07-27 |
| Wafer processing using thermal nitride etch mask Grant 5,711,891 - Pearce January 27, 1 | 1998-01-27 |
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