name:-0.87903785705566
name:-0.049700021743774
name:-0.0013680458068848
Patti; Robert Patent Filings

Patti; Robert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Patti; Robert.The latest application filed is for "all optical identification and sensor system with power on discovery".

Company Profile
0.13.9
  • Patti; Robert - Warrenville IL
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Trademarks
Patent Activity
PatentDate
All optical identification and sensor system with power on discovery
Grant 11,133,866 - Mandecki , et al. September 28, 2
2021-09-28
All Optical Identification And Sensor System With Power On Discovery
App 20180091224 - Mandecki; Wlodek ;   et al.
2018-03-29
Fiducial scheme adapted for stacked integrated circuits
Grant 8,222,121 - Patti , et al. July 17, 2
2012-07-17
Method for bonding wafers to produce stacked integrated circuits
Grant 8,183,127 - Patti , et al. May 22, 2
2012-05-22
Fiducial Scheme Adapted for Stacked Integrated Circuits
App 20110117701 - Patti; Robert ;   et al.
2011-05-19
Fiducial scheme adapted for stacked integrated circuits
Grant 7,898,095 - Patti , et al. March 1, 2
2011-03-01
Method for Bonding Wafers to Produce Stacked Integrated Circuits
App 20100233850 - Patti; Robert ;   et al.
2010-09-16
Method for bonding wafers to produce stacked integrated circuits
Grant 7,750,488 - Patti , et al. July 6, 2
2010-07-06
Method for bonding wafers to produce stacked integrated circuits
App 20080006938 - Patti; Robert ;   et al.
2008-01-10
Fiducial scheme adapted for stacked integrated circuits
App 20070216041 - Patti; Robert ;   et al.
2007-09-20
Network with programmable interconnect nodes adapted to large integrated circuits
Grant 7,159,047 - Klecka , et al. January 2, 2
2007-01-02
Network with programmable interconnect nodes adapted to large integrated circuits
App 20050251646 - Klecka, Mark ;   et al.
2005-11-10
Interlocking conductor method for bonding wafers to produce stacked integrated circuits
Grant 6,838,774 - Patti January 4, 2
2005-01-04
Error-correcting code adapted for memories that store multiple bits per storage cell
Grant 6,785,860 - Patti August 31, 2
2004-08-31
Interlocking conductor method for bonding wafers to produce stacked integrated circuits
App 20040048459 - Patti, Robert
2004-03-11
Interlocking conductor method for bonding wafers to produce stacked integrated circuits
Grant 6,642,081 - Patti November 4, 2
2003-11-04
Interlocking Conductor Method For Bonding Wafers To Produce Stacked Integrated Circuits
App 20030193076 - Patti, Robert
2003-10-16
Dynamically configurated storage array with improved data access
Grant 6,469,945 - Patti , et al. October 22, 2
2002-10-22
Dynamically configurated storage array with improved data access
App 20010048625 - Patti, Robert ;   et al.
2001-12-06
Connection arrangement for enbaling the use of identical chips in 3-dimensional stacks of chips requiring address specific to each chip
Grant 6,271,587 - Patti August 7, 2
2001-08-07
Dynamic configuration of storage arrays
Grant 6,236,602 - Patti May 22, 2
2001-05-22
DRAM that stores multiple bits per storage cell
Grant 6,141,261 - Patti October 31, 2
2000-10-31

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed