Paton; Eric
Patent Applications and Registrations
Patent applications and USPTO patent grants for Paton; Eric.The latest application filed is for "zero interface polysilicon to polysilicon gate for flash memory".
- Paton; Eric - Morgan Hill CA
| Patent | Date |
|---|---|
| Zero interface polysilicon to polysilicon gate for flash memory Grant 7,863,175 - Ogle , et al. January 4, 2 | 2011-01-04 |
| Zero Interface Polysilicon To Polysilicon Gate For Flash Memory App 20080149986 - Ogle, Jr.; Robert Bertram ; et al. | 2008-06-26 |
| Shallow junction semiconductor Grant 7,298,012 - Pelella , et al. November 20, 2 | 2007-11-20 |
| Interface layer between dual polycrystalline silicon layers Grant 7,256,141 - Ramsbey , et al. August 14, 2 | 2007-08-14 |
| Shallow Junction Semiconductor App 20060180873 - Pelella; Mario M. ; et al. | 2006-08-17 |
| Shallow junction semiconductor and method for the fabrication thereof Grant 7,033,916 - Pelella , et al. April 25, 2 | 2006-04-25 |
| Method of manufacturing semiconductor device having nickel silicide with reduced interface roughness Grant 6,967,160 - Paton , et al. November 22, 2 | 2005-11-22 |
| Measurement of lateral diffusion of diffused layers Grant 6,878,559 - Borden , et al. April 12, 2 | 2005-04-12 |
| Nickel silicide with reduced interface roughness Grant 6,873,051 - Paton , et al. March 29, 2 | 2005-03-29 |
| Wafer pattern variation of integrated circuit fabrication Grant 6,812,550 - En , et al. November 2, 2 | 2004-11-02 |
| Methods for improved metal gate fabrication Grant 6,773,978 - Besser , et al. August 10, 2 | 2004-08-10 |
| Method of forming reliable Cu interconnects Grant 6,727,176 - Ngo , et al. April 27, 2 | 2004-04-27 |
| Measurement Of Lateral Diffusion Of Diffused Layers App 20040063225 - Borden, Peter G. ; et al. | 2004-04-01 |
| Method and device using silicide contacts for semiconductor processing Grant 6,689,688 - Besser , et al. February 10, 2 | 2004-02-10 |
| Method and device using silicide contacts for semiconductor processing App 20030235984 - Besser, Paul Raymond ; et al. | 2003-12-25 |
| Method and device using silicide contacts for semiconductor processing App 20030235981 - Paton, Eric ; et al. | 2003-12-25 |
| Method of eliminating voids in W plugs Grant 6,638,861 - Ngo , et al. October 28, 2 | 2003-10-28 |
| Method of forming reliable Cu interconnects App 20030087522 - Ngo, Minh Van ; et al. | 2003-05-08 |
| Elapsed Time Indicator For Controlled Environments And Method Of Use App 20020000184 - PATON, ERIC ; et al. | 2002-01-03 |
| High dielectric constant materials as gate dielectrics Grant 6,297,107 - Paton , et al. October 2, 2 | 2001-10-02 |
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