Patel; Shwetal Arvind
Patent Applications and Registrations
Patent applications and USPTO patent grants for Patel; Shwetal Arvind.The latest application filed is for "ddr5 client pmic power up sequence and state transitions".
- Patel; Shwetal Arvind - San Jose CA
| Patent | Date |
|---|---|
| Ddr5 Client Pmic Power Up Sequence And State Transitions App 20220197366 - Patel; Shwetal Arvind ; et al. | 2022-06-23 |
| DDR5 client PMIC power up sequence and state transitions Grant 11,249,539 - Patel , et al. February 15, 2 | 2022-02-15 |
| Ddr5 Client Pmic Power Up Sequence And State Transitions App 20200409446 - Patel; Shwetal Arvind ; et al. | 2020-12-31 |
| DDR5 RCD interface protocol and operation Grant 10,776,293 - Patel , et al. September 15, 2 | 2020-09-15 |
| DDR5 PMIC interface protocol and operation Grant 10,769,082 - Patel , et al. Sep | 2020-09-08 |
| Ddr5 Rcd Interface Protocol And Operation App 20190340141 - Patel; Shwetal Arvind ; et al. | 2019-11-07 |
| Ddr5 Pmic Interface Protocol And Operation App 20190340142 - Patel; Shwetal Arvind ; et al. | 2019-11-07 |
| Register clock driver for DDR5 memory Grant 10,401,899 - Patel Sep | 2019-09-03 |
| Synchronization of data transmission with a clock signal after a memory mode switch Grant 9,847,112 - Patel December 19, 2 | 2017-12-19 |
| Register Clock Driver For Ddr5 Memory App 20170344051 - PATEL; Shwetal Arvind | 2017-11-30 |
| Synchronization After A Memory Mode Switch App 20170256295 - Patel; Shwetal Arvind | 2017-09-07 |
| Memory includes transmitter for data synchronization transmission after a mode switch and method thereof Grant 9,552,870 - Patel January 24, 2 | 2017-01-24 |
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