loadpatents
name:-0.019150018692017
name:-0.0077848434448242
name:-0.00046205520629883
Patel; Parsotam T. Patent Filings

Patel; Parsotam T.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Patel; Parsotam T..The latest application filed is for "proactive routing system and method".

Company Profile
0.7.15
  • Patel; Parsotam T. - Austin TX
  • Patel; Parsotam T. - Round Rock TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Proactive Routing System And Method
App 20090254875 - Mehrotra; Sharad ;   et al.
2009-10-08
Enhanced Routing Grid System and Method
App 20090070726 - Mehrotra; Sharad ;   et al.
2009-03-12
Enhanced Routing Grid System and Method
App 20080263497 - Mehrotra; Sharad ;   et al.
2008-10-23
Enhanced routing grid system and method
App 20080263496 - Mehrotra; Sharad ;   et al.
2008-10-23
Enhanced Routing Grid System and Method
App 20080263498 - Mehrotra; Sharad ;   et al.
2008-10-23
Enhanced Routing Grid System and Method
App 20080184187 - Mehrotra; Sharad ;   et al.
2008-07-31
Enhanced Routing Grid System And Method
App 20080072201 - Mehrotra; Sharad ;   et al.
2008-03-20
Enhanced Routing Grid System And Method
App 20080066044 - Mehrotra; Sharad ;   et al.
2008-03-13
Enhanced Routing Grid System And Method
App 20080059936 - Mehrotra; Sharad ;   et al.
2008-03-06
Enhanced Routing Grid System And Method
App 20080059935 - Mehrotra; Sharad ;   et al.
2008-03-06
Enhanced routing grid system and method
App 20070028201 - Mehrotra; Sharad ;   et al.
2007-02-01
Enhanced routing grid system and method
App 20060281221 - Mehrotra; Sharad ;   et al.
2006-12-14
Method and apparatus for transmitting data that utilizes delay elements to reduce capacitive coupling
Grant 6,832,277 - Durham , et al. December 14, 2
2004-12-14
Method and apparatus to facilitate global routing for an integrated circuit layout
Grant 6,735,754 - Mehrotra , et al. May 11, 2
2004-05-11
Data structure for fine-grid multi-level VLSI routing and method for storing the data structure in a computer readable medium
Grant 6,694,502 - Mehrotra , et al. February 17, 2
2004-02-17
Method and apparatus to facilitate global routing for an integrated circuit layout
App 20030229876 - Mehrotra, Sharad ;   et al.
2003-12-11
Data structure for fine-grid multi-level vlsi routing and method for storing the data structure in a computer readable medium
App 20030088843 - Mehrotra, Sharad ;   et al.
2003-05-08
Method and apparatus for transmitting data
App 20030028692 - Durham, Christopher M. ;   et al.
2003-02-06
Automated method and system for designing an optimized integrated circuit
Grant 5,764,532 - Patel June 9, 1
1998-06-09
Method of making bit stack compatible input/output circuits
Grant 4,988,636 - Masleid , et al. January 29, 1
1991-01-29
Saturation-limited bipolar transistor device
Grant 4,390,890 - Bergeron , et al. June 28, 1
1983-06-28
Non-volatile dynamic RAM cell
Grant 4,363,110 - Kalter , et al. December 7, 1
1982-12-07

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