Patel; Jagrut Viliskumar
Patent Applications and Registrations
Patent applications and USPTO patent grants for Patel; Jagrut Viliskumar.The latest application filed is for "adaptive memory calibration using bins".
- Patel; Jagrut Viliskumar - San Diego CA US
- Patel; Jagrut Viliskumar - Pasadena CA
| Patent | Date |
|---|---|
| Adaptive memory calibration using bins Grant 8,816,742 - Patel , et al. August 26, 2 | 2014-08-26 |
| Identifying process and temperature of silicon chips Grant 7,742,887 - Patel , et al. June 22, 2 | 2010-06-22 |
| Dynamic clock frequency adjustment based on processor load Grant 7,711,966 - Prabhakaran , et al. May 4, 2 | 2010-05-04 |
| Adaptive memory calibration using bins App 20080123444 - Patel; Jagrut Viliskumar ; et al. | 2008-05-29 |
| Integrated circuit with adaptive speed binning App 20060238230 - Patel; Jagrut Viliskumar ; et al. | 2006-10-26 |
| Dynamic clock frequency adjustment based on processor load App 20060047987 - Prabhakaran; Rajeev ; et al. | 2006-03-02 |
| Voltage scaling using material-based reference model App 20060038622 - Choe; Vyungchon ; et al. | 2006-02-23 |
| Identifying process and temperature of silicon chips App 20050114056 - Patel, Jagrut Viliskumar ; et al. | 2005-05-26 |
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