Patel; Binta Minesh
Patent Applications and Registrations
Patent applications and USPTO patent grants for Patel; Binta Minesh.The latest application filed is for "apparatus and method of utilizing alias hit signals to detect errors within the real address tag arrays".
- Patel; Binta Minesh - Round Rock TX
- Patel; Binta Minesh - Rochester MN
| Patent | Date |
|---|---|
| Apparatus and method of utilizing Alias Hit signals to detect errors within the real address tag arrays Grant 6,640,293 - Paredes , et al. October 28, 2 | 2003-10-28 |
| Circuit driver on SOI for merged logic and memory circuits Grant 6,157,216 - Lattimore , et al. December 5, 2 | 2000-12-05 |
| Silicon on insulator domino logic circuits Grant 6,049,230 - Durham , et al. April 11, 2 | 2000-04-11 |
| Multi-threaded cell for a memory Grant 5,778,243 - Aipperspach , et al. July 7, 1 | 1998-07-07 |
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