Pastorello; Douglas F.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pastorello; Douglas F..The latest application filed is for "modified first-order noise-shaping dynamic-element-matching technique".

Company Profile

1.22.13

Pastorello; Douglas F. - Hudson NH
Pastorello; Douglas F. - Nashua NH

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Calibration of a time-to-digital converter using a virtual phase-locked loop Grant 11,283,459 - Monk , et al. March 22, 2	2022-03-22
Calibration of an interpolative divider using a virtual phase-locked loop Grant 10,833,682 - Monk , et al. November 10, 2	2020-11-10
Spur cancellation in a PLL system with an automatically updated target spur frequency Grant 10,819,353 - Monk , et al. October 27, 2	2020-10-27
Metastable-free output synchronization for multiple-chip systems and the like Grant 10,511,312 - Pastorello , et al. Dec	2019-12-17
Differential voltage-controlled oscillator analog-to-digital converter using input-referred offset Grant 9,588,497 - Monk , et al. March 7, 2	2017-03-07
Modified First-order Noise-shaping Dynamic-element-matching Technique App 20140118172 - Gong; Xue-Mei ; et al.	2014-05-01
Programmable I/O cell capable of holding its state in power-down mode Grant 8,041,975 - Sahu , et al. October 18, 2	2011-10-18
Memory power controller Grant 8,020,010 - Pastorello , et al. September 13, 2	2011-09-13
Microcontroller unit (MCU) with power saving mode Grant 8,010,819 - Pastorello , et al. August 30, 2	2011-08-30
Memory Power Controller App 20090319814 - PASTORELLO; DOUGLAS F. ; et al.	2009-12-24
Mcu With Power Saving Mode App 20090187773 - PASTORELLO; DOUGLAS F. ; et al.	2009-07-23
Tri-level test mode terminal in limited terminal environment Grant 7,562,275 - Juhn , et al. July 14, 2	2009-07-14
High-speed divider with reduced power consumption Grant 7,551,009 - Garlapati , et al. June 23, 2	2009-06-23
MCU with power saving mode Grant 7,441,131 - Pastorello , et al. October 21, 2	2008-10-21
Programmable I/o Cell Capable Of Holding Its State In Power-down Mode App 20080246526 - SAHU; BIRANCHINATH ; et al.	2008-10-09
High-speed Divider With Reduced Power Consumption App 20080204088 - Garlapati; Akhil K. ; et al.	2008-08-28
High-speed divider with pulse-width control Grant 7,405,601 - Garlapati , et al. July 29, 2	2008-07-29
Programmable I/O cell capable of holding its state in power-down mode Grant 7,373,533 - Sahu , et al. May 13, 2	2008-05-13
Tri-level Test Mode Terminal In Limited Terminal Environment App 20080091992 - Juhn; Richard ; et al.	2008-04-17
High-speed Divider With Pulse-width Control App 20070139088 - Garlapati; Akhil K. ; et al.	2007-06-21
Programmable I/O cell capable of holding its state in power-down mode App 20070079149 - Sahu; Biranchinath ; et al.	2007-04-05
MCU with power saving mode App 20070079148 - Pastorello; Douglas F. ; et al.	2007-04-05
Phase selectable divider circuit Grant 7,187,216 - Sun , et al. March 6, 2	2007-03-06
Programmable frequency divider Grant 7,113,009 - Sun , et al. September 26, 2	2006-09-26
Phase selectable divider circuit App 20050242848 - Sun, Lizhong ; et al.	2005-11-03
Programmable frequency divider App 20050212570 - Sun, Lizhong ; et al.	2005-09-29
Auto-detection between referenceless and reference clock mode of operation Grant 6,831,523 - Pastorello , et al. December 14, 2	2004-12-14
Method and apparatus for handling a framing error at a serial interface by forcing invalid commands to be read upon determine the command is invalid Grant 6,760,854 - Pastorello July 6, 2	2004-07-06
Offset correction and slicing level adjustment for amplifier circuits Grant 6,657,488 - King , et al. December 2, 2	2003-12-02
Prompt resynchronization for a serial interface App 20030196130 - Pastorello, Douglas F.	2003-10-16
Energy-to-pulse converter systems, devices, and methods wherein the output frequency is greater than the calculation frequency and having output phasing Grant 6,522,982 - Pastorello , et al. February 18, 2	2003-02-18
Single phase bi-directional electrical measurement systems and methods using ADCs Grant 6,417,792 - King , et al. July 9, 2	2002-07-09
Version with markings to show changes made App 20020039041 - Gardei, William F. ; et al.	2002-04-04
High pass filtering with automatic phase equalization Grant 6,271,778 - King , et al. August 7, 2	2001-08-07
Reduced power FIR filter Grant 5,923,273 - Pastorello July 13, 1	1999-07-13

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