loadpatents
name:-0.0061540603637695
name:-0.017692804336548
name:-0.0081748962402344
Pass; Christopher J. Patent Filings

Pass; Christopher J.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pass; Christopher J..The latest application filed is for "methods and circuitry for programming non-volatile resistive switches using varistors".

Company Profile
4.14.4
  • Pass; Christopher J. - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Methods And Circuitry For Programming Non-volatile Resistive Switches Using Varistors
App 20200075088 - He; Yue-Song ;   et al.
2020-03-05
Methods and circuitry for programming non-volatile resistive switches using varistors
Grant 10,573,375 - He , et al. Feb
2020-02-25
Integrated circuits with programmable non-volatile resistive switch elements
Grant 10,447,275 - Lee , et al. Oc
2019-10-15
Integrated circuits with complementary non-volatile resistive memory elements
Grant 10,269,426 - Smolen , et al.
2019-04-23
Integrated Circuits With Programmable Non-volatile Resistive Switch Elements
App 20190020344 - Lee; Andy L. ;   et al.
2019-01-17
Integrated Circuits With Complementary Non-volatile Resistive Memory Elements
App 20180366192 - Smolen; Richard G. ;   et al.
2018-12-20
Integrated circuits with programmable non-volatile resistive switch elements
Grant 10,090,840 - Lee , et al. October 2, 2
2018-10-02
Methods and apparatuses for optimizing power and functionality in transistors
Grant 10,037,992 - Wu , et al. July 31, 2
2018-07-31
Method for fabricating integrated circuits with patterned thermal adjustment layers for design optimization
Grant 8,912,104 - Ratakonda , et al. December 16, 2
2014-12-16
Angled implantation for deep submicron device optimization
Grant 8,519,403 - Hsu , et al. August 27, 2
2013-08-27
Angled implantation for deep submicron device optimization
Grant 7,883,946 - Hsu , et al. February 8, 2
2011-02-08
Underfill for maximum flip chip package reliability
Grant 6,956,165 - Hata , et al. October 18, 2
2005-10-18
Nonvolatile memory cell with low doping region
Grant 6,828,620 - Pass , et al. December 7, 2
2004-12-07
Nonvolatile memory cell with low doping region
App 20030197218 - Pass, Christopher J. ;   et al.
2003-10-23
Method of margin testing programmable interconnect cell
Grant 6,122,209 - Pass , et al. September 19, 2
2000-09-19
Programmable interconnect junction
Grant 5,949,710 - Pass , et al. September 7, 1
1999-09-07

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed