| Patent | Date |
|---|
Programming non-volatile electronic memory device with NAND architecture
Grant 10,825,525 - Pascucci , et al. November 3, 2 | 2020-11-03 |
Memory device with a common source select line for two memory portions of a logic sector
Grant 10,825,524 - Pascucci , et al. November 3, 2 | 2020-11-03 |
Electronic Memory Device Having Two Portions That Can Be Decoupled
App 20190147957 - PASCUCCI; LUIGI ; et al. | 2019-05-16 |
Electronic Memory Device Having Two Portions That Can Be Decoupled
App 20190147958 - PASCUCCI; LUIGI ; et al. | 2019-05-16 |
Electronic memory device having two portions that can be decoupled
Grant 10,170,191 - Pascucci , et al. J | 2019-01-01 |
Electronic Memory Device Having Two Portions That Can Be Decoupled
App 20170316832 - PASCUCCI; LUIGI ; et al. | 2017-11-02 |
Semiconductor field-effect transistor, memory cell and memory device
Grant 9,287,284 - Rolandi , et al. March 15, 2 | 2016-03-15 |
Non-volative Electronic Memory Device With Nand Structure Being Monolithically Integrated On Semiconductor
App 20140347930 - PASCUCCI; LUIGI ; et al. | 2014-11-27 |
Semiconductor Field-Effect Transistor, Memory Cell and Memory Device
App 20140302649 - Rolandi; Paolo ; et al. | 2014-10-09 |
Non-volatile electronic memory device with NAND structure being monolithically integrated on semiconductor
Grant 8,824,205 - Pascucci , et al. September 2, 2 | 2014-09-02 |
Semiconductor field-effect transistor, memory cell and memory device
Grant 8,759,915 - Rolandi , et al. June 24, 2 | 2014-06-24 |
Non-volatile electronic memory device with NAND structure being monolithically integrated on semiconductor
Grant 8,630,115 - Pascucci , et al. January 14, 2 | 2014-01-14 |
Non-Volatile Electronic Memory Device With NAND Structure Being Monolithically Integrated On Semiconductor
App 20110286269 - Pascucci; Luigi ; et al. | 2011-11-24 |
Configuration terminal for integrated devices and method for configuring an integrated device
Grant 8,030,765 - Pascucci October 4, 2 | 2011-10-04 |
Semiconductor Field-effect Transistor, Memory Cell And Memory Device
App 20100213529 - Rolandi; Paolo ; et al. | 2010-08-26 |
Method for accessing in reading, writing and programming to a NAND non-volatile memory electronic device monolithically integrated on semiconductor
Grant 7,649,778 - Pascucci , et al. January 19, 2 | 2010-01-19 |
Configuration Terminal For Integrated Devices And Method For Configuring An Integrated Device
App 20090256248 - Pascucci; Luigi | 2009-10-15 |
Method for Accessing in Reading, Writing and Programming to a NAND Non-Volatile Memory Electronic Device Monolithically Integrated on Semiconductor
App 20090180328 - Pascucci; Luigi ; et al. | 2009-07-16 |
Method for accessing in reading, writing and programming to a nand non-volatile memory electronic device monolithically integrated on semiconductor
Grant 7,529,881 - Pascucci , et al. May 5, 2 | 2009-05-05 |
Row decoder circuit and related system and method
Grant 7,525,851 - Pascucci , et al. April 28, 2 | 2009-04-28 |
Configuration terminal for integrated devices and method for configuring an integrated device
Grant 7,501,705 - Pascucci March 10, 2 | 2009-03-10 |
Method and system for refreshing a memory device during reading thereof
Grant 7,417,900 - Rolandi , et al. August 26, 2 | 2008-08-26 |
Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor
Grant 7,397,700 - Pascucci , et al. July 8, 2 | 2008-07-08 |
Read/verify circuit for multilevel memory cells with ramp read voltage, and read/verify method thereof
Grant 7,397,702 - Rolandi , et al. July 8, 2 | 2008-07-08 |
Method And System For Refreshing A Memory Device During Reading Thereof
App 20070279996 - Rolandi; Paolo ; et al. | 2007-12-06 |
Integrated electronic non-volatile memory device having nand structure
Grant 7,295,472 - Pascucci , et al. November 13, 2 | 2007-11-13 |
Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor
Grant 7,274,594 - Pascucci , et al. September 25, 2 | 2007-09-25 |
Method For Accessing In Reading, Writing And Programming To A Nand Non-volatile Memory Electronic Device Monolithically Integrated On Semiconctor
App 20070153578 - Pascucci; Luigi ; et al. | 2007-07-05 |
Pointer circuit
Grant 7,181,592 - Pascucci February 20, 2 | 2007-02-20 |
Non-volatile Memory Electronic Device With Nand Structure Being Monolithically Integrated On Semiconductor
App 20060274577 - Pascucci; Luigi ; et al. | 2006-12-07 |
Row decoder circuit and related system and method
App 20060268650 - Pascucci; Luigi ; et al. | 2006-11-30 |
Non-volatile Memory Electronic Device With Nand Structure Being Monolithically Integrated On Semiconductor
App 20060239076 - Pascucci; Luigi ; et al. | 2006-10-26 |
Non-volatile Memory Electronic Device With Nand Structure Being Monolithically Integrated On Semiconductor
App 20060227609 - Pascucci; Luigi ; et al. | 2006-10-12 |
Integrated Electronic Non Volatile Memory Device Having Nand Structure
App 20060227610 - Pascucci; Luigi ; et al. | 2006-10-12 |
Configuration terminal for integrated devices and method for configuring an integrated device
App 20060103001 - Pascucci; Luigi | 2006-05-18 |
Non-volatile latch circuit
Grant 7,031,189 - Pascucci April 18, 2 | 2006-04-18 |
Semiconductor memory system including selection transistors
Grant 7,023,728 - Pascucci April 4, 2 | 2006-04-04 |
Binary-number comparator
Grant 7,016,931 - Pascucci March 21, 2 | 2006-03-21 |
Read/verify circuit for multilevel memory cells with ramp read voltage, and read/verify method thereof
App 20060028872 - Rolandi; Paolo ; et al. | 2006-02-09 |
Method for controlling programming voltage levels of non-volatile memory cells, the method tracking the cell features, and corresponding voltage regulator
Grant 6,967,876 - Rolandi , et al. November 22, 2 | 2005-11-22 |
Process for fabricating a dual charge storage location memory cell
Grant 6,958,510 - Pascucci October 25, 2 | 2005-10-25 |
Line selector for a matrix of memory elements
Grant 6,930,927 - Pascucci August 16, 2 | 2005-08-16 |
Programming method of the memory cells in a multilevel non-volatile memory device
Grant 6,920,066 - Pascucci , et al. July 19, 2 | 2005-07-19 |
Electrically-programmable non-volatile memory cell
Grant 6,882,001 - Pascucci April 19, 2 | 2005-04-19 |
Method for controlling programming voltage levels of non-volatile memory cells, the method tracking the cell features, and corresponding voltage regulator
App 20050068803 - Rolandi, Paolo ; et al. | 2005-03-31 |
Method for reducing spurious erasing during programming of a nonvolatile NROM
Grant 6,826,083 - Pascucci November 30, 2 | 2004-11-30 |
Synchronization circuit for read paths of an electronic memory
Grant 6,804,756 - Pascucci October 12, 2 | 2004-10-12 |
Semiconductor memory system including selection transistors
App 20040190335 - Pascucci, Luigi | 2004-09-30 |
Line selector for a matrix of memory elements
App 20040062132 - Pascucci, Luigi | 2004-04-01 |
Interlaced memory device with random or sequential access
Grant 6,701,419 - Tomaiuolo , et al. March 2, 2 | 2004-03-02 |
Memory with improved differential reading system
Grant 6,700,819 - Pascucci March 2, 2 | 2004-03-02 |
Programming method of the memory cells in a multilevel non-volatile memory device
App 20040037144 - Pascucci, Luigi ; et al. | 2004-02-26 |
Binary encoding circuit
Grant 6,696,990 - Pascucci February 24, 2 | 2004-02-24 |
Non-volatile latch circuit
App 20040008539 - Pascucci, Luigi | 2004-01-15 |
Method for reducing spurious erasing during programming of a nonvolatile NROM
App 20030235100 - Pascucci, Luigi | 2003-12-25 |
Electrically-programmable non-volatile memory cell
App 20030197217 - Pascucci, Luigi | 2003-10-23 |
Semiconductor memory system
Grant 6,594,180 - Pascucci July 15, 2 | 2003-07-15 |
Binary encoding circuit
App 20030122693 - Pascucci, Luigi | 2003-07-03 |
Interleaved memory device for burst type access in synchronous read mode with the two semi-arrays independently readable in random access asynchronous mode
Grant 6,587,913 - Campanale , et al. July 1, 2 | 2003-07-01 |
Process for fabricating a dual charge storage location memory cell
App 20030119258 - Pascucci, Luigi | 2003-06-26 |
Pointer circuit
App 20030101328 - Pascucci, Luigi | 2003-05-29 |
Column multiplexer for semiconductor memories
Grant 6,552,952 - Pascucci April 22, 2 | 2003-04-22 |
Binary-number comparator
App 20030023654 - Pascucci, Luigi | 2003-01-30 |
Memory with improved differential reading system
App 20030016572 - Pascucci, Luigi | 2003-01-23 |
Semiconductor memory system
App 20020196662 - Pascucci, Luigi | 2002-12-26 |
Column multiplexer for semiconductor memories
App 20020196695 - Pascucci, Luigi | 2002-12-26 |
Interlaced memory device with random or sequential access
App 20020087817 - Tomaiuolo, Francesco ; et al. | 2002-07-04 |
Control and timing structure for a memory
App 20020067655 - Pascucci, Luigi | 2002-06-06 |
Semiconductor memory architecture
App 20020067640 - Pascucci, Luigi | 2002-06-06 |
Internal addressing structure of a semiconductor memory
App 20020054537 - Pascucci, Luigi | 2002-05-09 |
Circuit for selectively enabling one among a plurality of circuit alternatives of an integrated circuit
App 20020044003 - Pascucci, Luigi | 2002-04-18 |
Timesharing Internal Bus, Particularly For Non-volatile Memories
App 20010042157 - PASCUCCI, LUIGI ; et al. | 2001-11-15 |
Internal regeneration of the address latch enable (ALE) signal of a protocol of management of a burst interleaved memory and related circuit
App 20010036121 - Nicosia, Salvatore ; et al. | 2001-11-01 |
Interleaved memory device for burst type access in synchronous read mode with the two semi-arrays independently readable in random access asynchronous mode
App 20010033245 - Campanale, Fabrizio ; et al. | 2001-10-25 |
Synchronization circuit for read paths of an eletronic memory
App 20010029575 - Pascucci, Luigi | 2001-10-11 |
Synchronous counter for electronic memories
App 20010014041 - Pascucci, Luigi | 2001-08-16 |
Gain modulated sense amplifier and method of operating the same
Grant 6,078,523 - Pascucci June 20, 2 | 2000-06-20 |
Sense circuit for reading data stored in nonvolatile memory cells
Grant RE36,579 - Pascucci , et al. February 22, 2 | 2000-02-22 |
Semiconductor memory device with clocked column redundancy and time-shared redundancy data transfer approach
Grant 5,968,183 - Pascucci October 19, 1 | 1999-10-19 |
Method for detecting redunded defective addresses in a memory device with redundancy
Grant 5,936,907 - Pascucci August 10, 1 | 1999-08-10 |
Standby voltage boosting stage and method for a memory device
Grant 5,889,723 - Pascucci March 30, 1 | 1999-03-30 |
Method for verifying electrically programmable non-volatile memory cells of an electrically programmable non-volatile memory device after programming
Grant 5,864,503 - Pascucci January 26, 1 | 1999-01-26 |
Decoding hierarchical architecture for high integration memories
Grant 5,854,770 - Pascucci December 29, 1 | 1998-12-29 |
Threshold detecting device
Grant 5,847,584 - Pascucci December 8, 1 | 1998-12-08 |
Anti-noise and auto-stand-by memory architecture
Grant 5,844,851 - Pascucci , et al. December 1, 1 | 1998-12-01 |
Memory device with clocked column redundancy
Grant 5,831,915 - Pascucci November 3, 1 | 1998-11-03 |
Voltage booster for memory devices
Grant 5,805,435 - Pascucci September 8, 1 | 1998-09-08 |
Voltage booster with an acceleration circuit
Grant 5,768,115 - Pascucci , et al. June 16, 1 | 1998-06-16 |
Programmable multibit register for coincidence and jump operations and coincidence fuse cell
Grant 5,731,716 - Pascucci March 24, 1 | 1998-03-24 |
Dynamic selection control in a memory
Grant 5,708,604 - Fontana , et al. January 13, 1 | 1998-01-13 |
Integrated circuitry for checking the utilization rate of redundancy memory elements in a semiconductor memory device
Grant 5,708,601 - McKenny , et al. January 13, 1 | 1998-01-13 |
Internal timing method and circuit for programmable memories
Grant 5,663,921 - Pascucci , et al. September 2, 1 | 1997-09-02 |
Unbalanced latch and fuse circuit including the same
Grant 5,659,498 - Pascucci , et al. August 19, 1 | 1997-08-19 |
Method for programming redundancy registers in a column redundancy integrated circuitry for a semiconductor memory device, and column redundancy integrated circuitry
Grant 5,602,786 - Pascucci , et al. February 11, 1 | 1997-02-11 |
Memory array cell reading circuit with extra current branch
Grant 5,563,826 - Pascucci , et al. October 8, 1 | 1996-10-08 |
Programmable logic array structure for semiconductor nonvolatile memories, particularly flash-eeproms
Grant 5,559,449 - Padoan , et al. September 24, 1 | 1996-09-24 |
Integrated programming circuitry for an electrically programmable semiconductor memory device with redundancy
Grant 5,548,554 - Pascucci , et al. August 20, 1 | 1996-08-20 |
Bias circuit for a memory line decoder driver of nonvolatile memories
Grant 5,499,217 - Pascucci , et al. March 12, 1 | 1996-03-12 |
Integrated circuitry for checking the utilization rate of redundancy memory elements in a semiconductor memory device
Grant 5,493,531 - Pascucci , et al. February 20, 1 | 1996-02-20 |
Regulation of the output voltage of a voltage multiplier
Grant RE35,121 - Olivo , et al. December 12, 1 | 1995-12-12 |
Semiconductor memory with memory matrix comprising redundancy cell columns associated with single matrix sectors
Grant 5,469,389 - Olivo , et al. November 21, 1 | 1995-11-21 |
Current offset sense amplifier of a modulated current or current unbalance type for programmable memories
Grant 5,461,713 - Pascucci * October 24, 1 | 1995-10-24 |
Dynamic reference system for sense amplifier
Grant 5,355,333 - Pascucci October 11, 1 | 1994-10-11 |
Current offset sense amplifier of a modulated current or current unbalance type for programmable memories
Grant 5,327,379 - Pascucci July 5, 1 | 1994-07-05 |
Zero-consumption power-on reset circuit
Grant 5,321,317 - Pascucci , et al. June 14, 1 | 1994-06-14 |
Compensated sense circuit for storage devices
Grant 5,282,169 - Pascucci , et al. January 25, 1 | 1994-01-25 |
Sense circuit for reading data stored in nonvolatile memory cells
Grant 5,218,570 - Pascucci , et al. June 8, 1 | 1993-06-08 |
CMOS logic circuit for high voltage operation
Grant 4,956,569 - Olivo , et al. September 11, 1 | 1990-09-11 |
Regulation of the output voltage of a voltage multiplier
Grant 4,933,827 - Olivo , et al. June 12, 1 | 1990-06-12 |
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