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name:-0.01094913482666
name:-0.019065141677856
name:-0.017035961151123
Parvizi; Mahdi Patent Filings

Parvizi; Mahdi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Parvizi; Mahdi.The latest application filed is for "apparatus and methods for low power frequency clock generation and distribution".

Company Profile
20.22.12
  • Parvizi; Mahdi - Kanata CA
  • Parvizi; Mahdi - Ottawa CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatus And Methods For Low Power Frequency Clock Generation And Distribution
App 20220171425 - Parvizi; Mahdi ;   et al.
2022-06-02
High-order phase tracking loop with segmented proportional and integral controls
Grant 11,349,486 - Aouini , et al. May 31, 2
2022-05-31
High-order phase tracking loop with segmented proportional and integral controls
App 20220149847 - Aouini; Sadok ;   et al.
2022-05-12
Apparatus and methods for high frequency clock generation
Grant 11,245,401 - Parvizi , et al. February 8, 2
2022-02-08
Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter
Grant 11,218,155 - Wen , et al. January 4, 2
2022-01-04
Apparatus and methods for low power clock generation in multi-channel high speed devices
Grant 11,196,534 - Parvizi , et al. December 7, 2
2021-12-07
Apparatus And Methods For High Frequency Clock Generation
App 20210313992 - Parvizi; Mahdi ;   et al.
2021-10-07
Apparatus And Methods For Digital Fractional Phase Locked Loop With A Current Mode Low Pass Filter
App 20210273644 - Wen; Tingjun ;   et al.
2021-09-02
Apparatus and methods for digital phase locked loop with analog proportional control function
Grant 11,012,081 - Parvizi , et al. May 18, 2
2021-05-18
Apparatus and Methods for Digital Phase Locked Loop with Analog Proportional Control Function
App 20210111729 - Parvizi; Mahdi ;   et al.
2021-04-15
Apparatus and methods for high frequency clock generation
Grant 10,903,841 - Parvizi , et al. January 26, 2
2021-01-26
Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter
Grant 10,848,164 - Wen , et al. November 24, 2
2020-11-24
High-order phase tracking loop with segmented proportional and integral controls
App 20200274537 - Aouini; Sadok ;   et al.
2020-08-27
High-order phase tracking loop with segmented proportional and integral controls
Grant 10,749,536 - Aouini , et al. A
2020-08-18
Apparatus and methods for realization of N time interleaved digital-to-analog converters
Grant 10,727,854 - Greshishchev , et al.
2020-07-28
Apparatus and methods for digital phase locked loop with analog proportional control function
Grant 10,715,155 - Parvizi , et al.
2020-07-14
Fully differential traveling wave series push-pull mach-zehnder modulator
Grant 10,678,112 - Parvizi , et al.
2020-06-09
Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset
Grant 10,680,585 - Aouini , et al.
2020-06-09
Fractional frequency synthesis by sigma-delta modulating frequency of a reference clock
App 20200177194 - Aouini; Sadok ;   et al.
2020-06-04
Fully differential traveling wave series push-pull Mach-Zehnder Modulator
App 20200081314 - Parvizi; Mahdi ;   et al.
2020-03-12
Quarter-rate charge-steering decision feedback equalizer (DFE)
Grant 10,554,453 - Parvizi , et al. Fe
2020-02-04
Quarter-rate charge-steering decision feedback equalizer (DFE) taps
Grant 10,536,303 - Pike , et al. Ja
2020-01-14
High-order phase tracking loop with segmented proportional and integral controls
Grant 10,516,403 - Aouini , et al. Dec
2019-12-24
Techniques and circuits for time-interleaved injection locked Voltage Controlled Oscillators with jitter accumulation reset
App 20190312573 - Aouini; Sadok ;   et al.
2019-10-10
Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators
Grant 10,425,099 - Aouini , et al. Sept
2019-09-24
Patterned accumulation mode capacitive phase shifter
Grant 10,330,962 - Calvo , et al.
2019-06-25
Fine resolution high speed linear delay element
Grant 10,320,374 - Parvizi , et al.
2019-06-11
Fine Resolution High Speed Linear Delay Element
App 20180302070 - Parvizi; Mahdi ;   et al.
2018-10-18
High order hybrid phase locked loop with digital scheme for jitter suppression
Grant 9,787,466 - Aouini , et al. October 10, 2
2017-10-10
High Order Hybrid Phase Locked Loop With Digital Scheme For Jitter Suppression
App 20170264425 - Aouini; Sadok ;   et al.
2017-09-14

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