Parsey, Jr.; John M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Parsey, Jr.; John M..The latest application filed is for "semiconductor die singulation method".

Company Profile

0.9.4

Parsey, Jr.; John M. - Phoenix AZ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of forming a semiconductor die cutting tool Grant 10,340,160 - Grivna , et al.	2019-07-02
Semiconductor die singulation method Grant 9,012,304 - Grivna , et al. April 21, 2	2015-04-21
Semiconductor device having a vertically-oriented conductive region that electrically connects a transistor structure to a substrate Grant RE45,365 - Loechelt , et al. February 10, 2	2015-02-10
Semiconductor die singulation method Grant 8,859,396 - Grivna , et al. October 14, 2	2014-10-14
Semiconductor Die Singulation Method App 20120244681 - Grivna; Gordon M. ; et al.	2012-09-27
Semiconductor Die Singulation Method App 20110244657 - Grivna; Gordon M. ; et al.	2011-10-06
Semiconductor device having deep trench charge compensation regions and method Grant 7,902,601 - Loechelt , et al. March 8, 2	2011-03-08
Method of forming a semiconductor device having trench charge compensation regions Grant 7,799,640 - Parsey, Jr. , et al. September 21, 2	2010-09-21
Semiconductor Device Having Deep Trench Charge Compensation Regions And Method App 20090096021 - Loechelt; Gary H. ; et al.	2009-04-16
Semiconductor device having deep trench charge compensation regions and method Grant 7,482,220 - Loechelt , et al. January 27, 2	2009-01-27
Method Of Forming A Semiconductor Device Having Trench Charge Compensation Regions App 20080081440 - Parsey, Jr.; John M. ; et al.	2008-04-03

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