Parmar; Vijay
Patent Applications and Registrations
Patent applications and USPTO patent grants for Parmar; Vijay.The latest application filed is for "method to dynamically inject errors in a repairable memory on silicon and a method to validate built-in-self-repair logic".
- Parmar; Vijay - Santa Clara CA
- Parmar; Vijay - SanJose CA
- Parmar; Vijay - Langenburg CA
- Parmar; Vijay - Pittsburgh PA
| Patent | Date |
|---|---|
| Method to dynamically inject errors in a repairable memory on silicon and a method to validate built-in-self-repair logic Grant 10,204,698 - Kraipak , et al. Feb | 2019-02-12 |
| Method To Dynamically Inject Errors In A Repairable Memory On Silicon And A Method To Validate Built-in-self-repair Logic App 20180174665 - Kraipak; Waseem ; et al. | 2018-06-21 |
| Computer implemented system for locating users and a method thereof Grant 9,390,613 - Yu , et al. July 12, 2 | 2016-07-12 |
| Sto and Go Ramps App 20140064896 - Parmar; Vijay | 2014-03-06 |
| E-Compactor App 20140041538 - Parmar; Vijay | 2014-02-13 |
| Database access computer language App 20080077602 - Warsaw; Rand ; et al. | 2008-03-27 |
| Energy efficiency measuring system and reporting methods Grant 6,785,620 - Kishlock , et al. August 31, 2 | 2004-08-31 |
| Capped bill systems, methods and products App 20040122764 - Bilski, Bernie ; et al. | 2004-06-24 |
| Capped bill systems, methods and products having an insurance component App 20030233323 - Bilski, Bernie ; et al. | 2003-12-18 |
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