Park; Stephen Keetai

Patent Applications and Registrations

Patent applications and USPTO patent grants for Park; Stephen Keetai.The latest application filed is for "method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer".

Company Profile

0.9.1

Park; Stephen Keetai - Austin TX
Park; Stephen Keetai - Cupertino CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Depth of focus (DOF) for trench-first-via-last (TFVL) damascene processing with hard mask and low viscosity photoresist Grant 6,881,665 - Tsui , et al. April 19, 2	2005-04-19
Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer Grant 6,756,297 - Park June 29, 2	2004-06-29
Integrated circuit having increased gate coupling capacitance Grant 6,682,978 - Park , et al. January 27, 2	2004-01-27
Integrated circuit having optimized gate coupling capacitance Grant 6,576,949 - Park June 10, 2	2003-06-10
Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer App 20020155694 - Park, Stephen Keetai	2002-10-24
Method of reducing contact size by spacer filling Grant 6,420,104 - Rangarajan , et al. July 16, 2	2002-07-16
Method of fabricating copper-based semiconductor devices using a sacrificial dielectric layer Grant 6,355,555 - Park March 12, 2	2002-03-12
Multipurpose graded silicon oxynitride cap layer Grant 6,306,758 - Park October 23, 2	2001-10-23
Resist flow method for defining openings for conductive interconnections in a dielectric layer Grant 6,265,306 - Starnes , et al. July 24, 2	2001-07-24
Multipurpose graded silicon oxynitride cap layer Grant 6,100,559 - Park August 8, 2	2000-08-08

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