Park; Myung Geun

Patent Applications and Registrations

Patent applications and USPTO patent grants for Park; Myung Geun.The latest application filed is for "novel microalgal strains of thraustochytrium genus, and method of producing polyunsaturated fatty acids using the same".

Company Profile

1.12.15

Park; Myung Geun - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Novel Microalgal Strains Of Thraustochytrium Genus, And Method Of Producing Polyunsaturated Fatty Acids Using The Same App 20210002680 - Kim; Ji Young ; et al.	2021-01-07
Semiconductor package including a conductive fabric Grant 9,786,590 - Hwang , et al. October 10, 2	2017-10-10
Semiconductor Package Including A Conductive Fabric App 20170179003 - HWANG; In Chul ; et al.	2017-06-22
Stack package Grant 8,680,652 - Kim , et al. March 25, 2	2014-03-25
Substrate for semiconductor package with improved bumping of chip bumps and contact pads and semiconductor package having the same Grant 8,581,397 - Park November 12, 2	2013-11-12
Stack Package App 20130087887 - KIM; Si Han ; et al.	2013-04-11
Stack Package App 20130082352 - KIM; Si Han ; et al.	2013-04-04
Semiconductor package requiring reduced manufacturing processes Grant 8,399,998 - Kim , et al. March 19, 2	2013-03-19
Printed Circuit Board And Flip Chip Package Using The Same With Improved Bump Joint Reliability App 20120205802 - KIM; Seong Cheol ; et al.	2012-08-16
Printed circuit board and flip chip package using the same with improved bump joint reliability Grant 8,183,689 - Kim , et al. May 22, 2	2012-05-22
Semiconductor Package With Through Electrodes And Method For Manufacturing The Same App 20120074529 - KIM; Ki-Young ; et al.	2012-03-29
Stack Package App 20110186978 - Kim; Si Han ; et al.	2011-08-04
Semiconductor Package Requiring Reduced Manufacturing Processes App 20110031604 - KIM; Ki Young ; et al.	2011-02-10
Flip chip package and method for manufacturing the same Grant 7,859,108 - Lee , et al. December 28, 2	2010-12-28
Method for manufacturing strip level substrate without warpage and method for manufacturing semiconductor package using the same Grant 7,595,255 - Kim , et al. September 29, 2	2009-09-29
Substrate For Semiconductor Package With Improved Bumping Of Chip Bumps And Contact Pads And Semiconductor Package Having The Same App 20090140422 - PARK; Myung Geun	2009-06-04
Flip Chip Package And Method For Manufacturing The Same App 20090140426 - LEE; Woong Sun ; et al.	2009-06-04
Semiconductor Package Having A Warpage Resistant Substrate App 20090096079 - PARK; Myung Geun	2009-04-16
Printed Circuit Board And Flip Chip Package Using The Same With Improved Bump Joint Reliability App 20080277783 - KIM; Seong Cheol ; et al.	2008-11-13
Method For Manufacturing Strip Level Substrate Without Warpage And Method For Manufacturing Semiconductor Package Using The Same App 20080280397 - KIM; Seong Cheol ; et al.	2008-11-13
Stack type package module and method for manufacturing the same Grant 7,417,308 - Park August 26, 2	2008-08-26
Stack type package module and method for manufacturing the same App 20070051664 - Park; Myung Geun	2007-03-08
Method for fabricating stacked chip package device Grant 6,677,181 - Park , et al. January 13, 2	2004-01-13
Stack package and method for fabricating the same App 20020005575 - Park, Myung Geun ; et al.	2002-01-17
Chip stack package utilizing a connecting hole to improve electrical connection between leadframes Grant 6,316,825 - Park , et al. November 13, 2	2001-11-13

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.