loadpatents
name:-0.019577980041504
name:-0.29623007774353
name:-0.0031540393829346
Park; Heechoul Patent Filings

Park; Heechoul

Patent Applications and Registrations

Patent applications and USPTO patent grants for Park; Heechoul.The latest application filed is for "memory bitcell with column select".

Company Profile
1.16.16
  • Park; Heechoul - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Detection of multiple accesses to a row address of a dynamic memory within a refresh period
Grant 10,108,357 - Jeffrey , et al. October 23, 2
2018-10-23
Memory bitcell with column select
Grant 10,008,257 - Kwack , et al. June 26, 2
2018-06-26
Memory Bitcell With Column Select
App 20170148506 - Kwack; Jinho ;   et al.
2017-05-25
Detection Of Multiple Accesses To A Row Address Of A Dynamic Memory Within A Refresh Period
App 20160246525 - Jeffrey; David ;   et al.
2016-08-25
Detection of multiple accesses to a row address of a dynamic memory within a refresh period
Grant 9,355,689 - Jeffrey , et al. May 31, 2
2016-05-31
Sense amp activation according to word line common point
Grant 9,336,862 - Won , et al. May 10, 2
2016-05-10
Sense Amp Activation According To Word Line Common Point
App 20150348614 - WON; Myung Gyoo ;   et al.
2015-12-03
Fast memory read-out
Grant 9,064,553 - Lee , et al. June 23, 2
2015-06-23
Detection Of Multiple Accesses To A Row Address Of A Dynamic Memory Within A Refresh Period
App 20150058549 - Jeffrey; David ;   et al.
2015-02-26
Process variation tolerant bank collision detection circuit
Grant 8,775,745 - Lee , et al. July 8, 2
2014-07-08
Fast Memory Read-out
App 20140146622 - Lee; Jungyong ;   et al.
2014-05-29
Process Variation Tolerant Bank Collision Detection Circuit
App 20140082321 - Lee; Jungyong ;   et al.
2014-03-20
Adaptive timing control circuitry to address leakage
Grant 8,482,316 - Liu , et al. July 9, 2
2013-07-09
Memory Array Clock Gating Scheme
App 20130159757 - PARK; HEECHOUL ;   et al.
2013-06-20
Methods and apparatuses for improving reduced power operations in embedded memory arrays
Grant 8,243,541 - Cho , et al. August 14, 2
2012-08-14
Dynamically controlled voltage regulator for a memory
Grant 7,924,650 - Cho , et al. April 12, 2
2011-04-12
Voltage regulator for write/read assist circuit
Grant 7,863,878 - Park , et al. January 4, 2
2011-01-04
Dynamically Controlled Voltage Regulator For A Memory
App 20100329063 - Cho; Hoyeol ;   et al.
2010-12-30
Precision falling edge generator
Grant 7,791,393 - Masleid , et al. September 7, 2
2010-09-07
Methods And Apparatuses For Improving Reduced Power Operations In Embedded Memory Arrays
App 20100157706 - Cho; Hoyeol ;   et al.
2010-06-24
Write and read assist circuit for SRAM with power recycling
Grant 7,679,948 - Park , et al. March 16, 2
2010-03-16
Read assist circuit of SRAM with low standby current
Grant 7,672,182 - Park , et al. March 2, 2
2010-03-02
Voltage Regulator For Write/read Assist Circuit
App 20100045249 - Park; Heechoul ;   et al.
2010-02-25
Read Assist Circuit Of Sram With Low Standby Current
App 20100008171 - Park; Heechoul ;   et al.
2010-01-14
Write And Read Assist Circuit For Sram With Power Recycling
App 20090303819 - Park; Heechoul ;   et al.
2009-12-10
Memory With Active Mode Back-bias Voltage Control And Method Of Operating Same
App 20090213641 - Park; Heechoul ;   et al.
2009-08-27
Skew tolerant phase shift driver with controlled reset pulse width
Grant 7,205,810 - Lee , et al. April 17, 2
2007-04-17
Skew Tolerant Phase Shift Driver With Controlled Reset Pulse Width
App 20070069790 - Lee; Jungyong ;   et al.
2007-03-29

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