loadpatents
Patent applications and USPTO patent grants for Park; Chang-Heon.The latest application filed is for "semiconductor device for reducing coupling capacitance".
Patent | Date |
---|---|
Semiconductor device with damascene bit line and method for manufacturing the same Grant 9,871,045 - Yeom , et al. January 16, 2 | 2018-01-16 |
Semiconductor device for reducing coupling capacitance Grant 9,728,540 - Han , et al. August 8, 2 | 2017-08-08 |
Semiconductor Device For Reducing Coupling Capacitance App 20160322364 - HAN; Ky Hyun ;   et al. | 2016-11-03 |
Semiconductor device for reducing coupling capacitance Grant 9,419,002 - Han , et al. August 16, 2 | 2016-08-16 |
Semiconductor Device And Manufacturing Method Thereof App 20150235950 - HAN; Ky Hyun ;   et al. | 2015-08-20 |
Semiconductor Device App 20140353744 - JUNG; Ho-Jin ;   et al. | 2014-12-04 |
Method for fabricating a semiconductor device Grant 7,608,546 - Park , et al. October 27, 2 | 2009-10-27 |
Method For Manufacturing A Phase Change Memory Device Capable Of Improving Thermal Efficiency Of Phase Change Material App 20090117748 - LEE; Dong Ryeol ;   et al. | 2009-05-07 |
Method For Forming Pattern In Semiconductor Device App 20080182395 - PARK; Chang-Heon ;   et al. | 2008-07-31 |
Method For Fabricating A Semiconductor Device App 20080160653 - PARK; Sang-Soo ;   et al. | 2008-07-03 |
Method for fabricating a semiconductor device App 20020081835 - Park, Chang Heon ;   et al. | 2002-06-27 |
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