Parekh; Kunal

Patent Applications and Registrations

Patent applications and USPTO patent grants for Parekh; Kunal.The latest application filed is for "systems, devices and methods of collecting information via touchless technology to control access to physical spaces".

Company Profile

2.27.24

Parekh; Kunal - Mumbai IN
Parekh; Kunal - Boise ID
PAREKH; KUNAL - PUNE IN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Systems, Devices And Methods Of Collecting Information Via Touchless Technology To Control Access To Physical Spaces App 20220036678 - Parekh; Kunal	2022-02-03
Methods for forming narrow vertical pillars and integrated circuit devices having the same Grant 10,971,683 - Liu , et al. April 6, 2	2021-04-06
Methods For Forming Narrow Vertical Pillars And Integrated Circuit Devices Having The Same App 20200350496 - Liu; Jun ; et al.	2020-11-05
Methods for forming narrow vertical pillars and integrated circuit devices having the same Grant 10,756,265 - Liu , et al. A	2020-08-25
Methods For Forming Narrow Vertical Pillars And Integrated Circuit Devices Having The Same App 20190097129 - Liu; Jun ; et al.	2019-03-28
Methods for forming narrow vertical pillars and integrated circuit devices having the same Grant 10,164,178 - Liu , et al. Dec	2018-12-25
Methods For Forming Narrow Vertical Pillars And Integrated Circuit Devices Having The Same App 20170256710 - Liu; Jun ; et al.	2017-09-07
Methods for forming narrow vertical pillars and integrated circuit devices having the same Grant 9,627,611 - Liu , et al. April 18, 2	2017-04-18
Memory having buried digit lines and methods of making the same Grant 9,263,095 - Parekh , et al. February 16, 2	2016-02-16
Method Of Forming A Dram Array Of Devices With Vertically Integrated Recessed Access Device And Digitline App 20140231894 - Parekh; Kunal ; et al.	2014-08-21
Methods For Forming Narrow Vertical Pillars And Integrated Circuit Devices Having The Same App 20140138604 - Liu; Jun ; et al.	2014-05-22
Method of forming a DRAM array of devices with vertically integrated recessed access device and digitline Grant 8,716,116 - Parekh , et al. May 6, 2	2014-05-06
Method And System For Managing Online Paid Advertisements App 20140067522 - MEHTA; ASHISH ; et al.	2014-03-06
Memory Having Buried Digit Lines And Methods Of Making The Same App 20130314967 - Parekh; Kunal ; et al.	2013-11-28
Memory having buried digit lines and methods of making the same Grant 8,497,541 - Parekh , et al. July 30, 2	2013-07-30
Display Devices Having Electrolessly Plated Conductors And Methods App 20120314171 - Jindal; Anurag ; et al.	2012-12-13
Semiconductor With Through-substrate Interconnect App 20110241205 - Kirby; Kyle ; et al.	2011-10-06
Method of Forming a DRAM Array of Devices with Vertically Integrated Recessed Access Device and Digitline App 20110220994 - Parekh; Kunal ; et al.	2011-09-15
Memory Having Buried Digit Lines And Methods Of Making The Same App 20110220980 - Parekh; Kunal ; et al.	2011-09-15
Semiconductor with through-substrate interconnect Grant 7,968,460 - Kirby , et al. June 28, 2	2011-06-28
Methods Of Forming A Non-Volatile Resistive Oxide Memory Cell And Methods Of Forming A Non-Volatile Resistive Oxide Memory Array App 20100003782 - Sinha; Nishant ; et al.	2010-01-07
Semiconductor With Through-substrate Interconnect App 20090315154 - Kirby; Kyle ; et al.	2009-12-24
Method of manufacturing sidewall spacers on a memory device, and device comprising same Grant 7,601,591 - Hwang , et al. October 13, 2	2009-10-13
Method of manufacturing sidewall spacers on a memory device, and device comprising same Grant 7,459,742 - Hwang , et al. December 2, 2	2008-12-02
Method Of Manufacturing Sidewall Spacers On A Memory Device, And Device Comprising Same App 20080119053 - Hwang; David K. ; et al.	2008-05-22
Method of manufacturing sidewall spacers on a memory device, and device comprising same Grant 7,341,906 - Hwang , et al. March 11, 2	2008-03-11
Stepped gate configuration for non-volatile memory Grant 7,306,991 - Manning , et al. December 11, 2	2007-12-11
Stepped gate configuration for non-volatile memory Grant 7,265,016 - Manning , et al. September 4, 2	2007-09-04
Method Of Manufacturing Sidewall Spacers On A Memory Device, And Device Comprising Same App 20070111436 - Hwang; David K. ; et al.	2007-05-17
Method of manufacturing sidewall spacers on a memory device, and device comprising same App 20060263969 - Hwang; David K. ; et al.	2006-11-23
Stepped gate configuration for non-volatile memory App 20060043466 - Manning; H. Montgomery ; et al.	2006-03-02
Stepped gate configuration for non-volatile memory App 20060043462 - Manning; H. Montgomery ; et al.	2006-03-02
Stepped gate configuration for non-volatile memory App 20060043467 - Manning; H. Montgomery ; et al.	2006-03-02
Stepped gate configuration for non-volatile memory App 20060043468 - Manning; H. Montgomery ; et al.	2006-03-02
Capacitor structure Grant 6,885,542 - Wu , et al. April 26, 2	2005-04-26
Capacitor Structure App 20050030697 - Wu, Zhiqiang ; et al.	2005-02-10
Capacitor structure Grant 6,787,839 - Wu , et al. September 7, 2	2004-09-07
Container capacitor Grant 6,756,627 - Wu , et al. June 29, 2	2004-06-29
Capacitor structure Grant 6,740,923 - Wu , et al. May 25, 2	2004-05-25
Method of making a concave capacitor Grant 6,682,984 - Wu , et al. January 27, 2	2004-01-27
Capacitor structure App 20020140020 - Wu, Zhiqiang ; et al.	2002-10-03
Capacitor structure App 20020135011 - Wu, Zhiqiang ; et al.	2002-09-26
Method of making a capacitor Grant 6,043,119 - Wu , et al. March 28, 2	2000-03-28
Method of forming a capacitor and a capacitor construction Grant 5,962,885 - Fischer , et al. October 5, 1	1999-10-05
Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells Grant 5,821,140 - Jost , et al. October 13, 1	1998-10-13
Method of making a capacitor Grant 5,786,250 - Wu , et al. July 28, 1	1998-07-28
Integrated circuits comprising interconnecting plugs Grant 5,686,747 - Jost , et al. November 11, 1	1997-11-11
Method of forming a cylindrical container stacked capacitor Grant 5,604,147 - Fischer , et al. February 18, 1	1997-02-18
Method of forming a bit line over capacitor array of memory cells and an array of bit line over capacitor array of memory cells Grant 5,563,089 - Jost , et al. October 8, 1	1996-10-08

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