loadpatents
name:-0.028928995132446
name:-0.02722692489624
name:-0.0006709098815918
Paredes; Jose Angel Patent Filings

Paredes; Jose Angel

Patent Applications and Registrations

Patent applications and USPTO patent grants for Paredes; Jose Angel.The latest application filed is for "processor instruction retry recovery".

Company Profile
0.22.21
  • Paredes; Jose Angel - Austin TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Processor instruction retry recovery
Grant 7,827,443 - Eisen , et al. November 2, 2
2010-11-02
Method and apparatus for implementing complex logic within a memory array
Grant 7,683,662 - Bianchi , et al. March 23, 2
2010-03-23
Register file
Grant 7,679,973 - Chu , et al. March 16, 2
2010-03-16
Transient noise detection scheme and apparatus
Grant 7,506,230 - Chu , et al. March 17, 2
2009-03-17
Processor Instruction Retry Recovery
App 20090063898 - Eisen; Susan Elizabeth ;   et al.
2009-03-05
Method and Apparatus for Implementing Complex Logic Within a Memory Array
App 20090027079 - Bianchi; Andrew James ;   et al.
2009-01-29
Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor
Grant 7,478,276 - Bishop , et al. January 13, 2
2009-01-13
Method for implementing complex logic within a memory array
Grant 7,471,103 - Bianchi , et al. December 30, 2
2008-12-30
Processor instruction retry recovery
Grant 7,467,325 - Eisen , et al. December 16, 2
2008-12-16
Register File
App 20080279015 - Chu; Sam Gat-Shang ;   et al.
2008-11-13
Register file
Grant 7,443,737 - Chu , et al. October 28, 2
2008-10-28
Method And Apparatus For Implementing Complex Logic Within A Memory Array
App 20080136447 - Bianchi; Andrew James ;   et al.
2008-06-12
Scannable Domino Latch Redundancy For Soft Error Rate Protection With Collision Avoidance
App 20070229132 - Chu; Sam Gat-Shang ;   et al.
2007-10-04
Leakage sensing and keeper circuit for proper operation of a dynamic circuit
Grant 7,202,704 - Chu , et al. April 10, 2
2007-04-10
Register file method incorporating read-after-write blocking using detection cells
Grant 7,142,463 - Chu , et al. November 28, 2
2006-11-28
Method and apparatus for selecting operating characteristics of a content addressable memory by using a compare mask
Grant 7,116,569 - Hinojosa , et al. October 3, 2
2006-10-03
Method And Apparatus For Selecting Operating Characteristics Of A Content Addressable Memory By Using A Compare Mask
App 20060181909 - Hinojosa; Joaquin ;   et al.
2006-08-17
Transient noise detection scheme and apparatus
App 20060184852 - Chu; Sam Gat-Shang ;   et al.
2006-08-17
Processor instruction retry recovery
App 20060179207 - Eisen; Susan Elizabeth ;   et al.
2006-08-10
Method for checkpointing instruction groups with out-of-order floating point instructions in a multi-threaded processor
App 20060179346 - Bishop; James Wilson ;   et al.
2006-08-10
Method and apparatus which implements a multi-ported LRU in a multiple-clock system
Grant 7,085,896 - Bianchi , et al. August 1, 2
2006-08-01
Dynamic-static logical control element for signaling an interval between the end of a control signal and a logical evaluation
Grant 7,015,723 - Chu , et al. March 21, 2
2006-03-21
Register file apparatus and method incorporating read-after-write blocking using detection cells
Grant 7,012,839 - Chu , et al. March 14, 2
2006-03-14
Leakage sensing and keeper circuit for proper operation of a dynamic circuit
App 20060049850 - Chu; Sam Gat-Shang ;   et al.
2006-03-09
Dynamic-static Logical Control Element For Signaling An Interval Between The End Of A Control Signal And A Logical Evaluation
App 20060038588 - Chu; Sam Gat-Shang ;   et al.
2006-02-23
Register file method incorporating read-after-write blocking using detection cells
App 20060039202 - Chu; Sam Gat-Shang ;   et al.
2006-02-23
Register File Apparatus And Method Incorporating Read-after-write Blocking Using Detection Cells
App 20060039203 - Chu; Sam Gat-Shang ;   et al.
2006-02-23
Multilevel register-file bit-read method and apparatus
Grant 7,002,860 - Chu , et al. February 21, 2
2006-02-21
Register file
App 20050216698 - Chu, Sam Gat-Shang ;   et al.
2005-09-29
Reducing sub-threshold leakage in a memory array
Grant 6,934,181 - Chu , et al. August 23, 2
2005-08-23
Register-file bit-read method and apparatus
Grant 6,914,450 - Chu , et al. July 5, 2
2005-07-05
Register-file Bit-read Method And Apparatus
App 20050099205 - Chu, Sam Gat-Shang ;   et al.
2005-05-12
Multilevel register-file bit-read method and apparatus
App 20050099851 - Chu, Sam Gat-Shang ;   et al.
2005-05-12
Apparatus And Method For A Radiation Resistant Latch
App 20040246782 - Chu, Sam Gat-Shang ;   et al.
2004-12-09
Apparatus And Method For A Radiation Resistant Latch With Integrated Scan
App 20040250184 - Chu, Sam Gat-Shang ;   et al.
2004-12-09
Apparatus and method for a radiation resistant latch
Grant 6,826,090 - Chu , et al. November 30, 2
2004-11-30
Apparatus and method for a radiation resistant latch with integrated scan
Grant 6,825,691 - Chu , et al. November 30, 2
2004-11-30
Method and apparatus which implements a multi-ported LRU in a multiple-clock system
App 20040221108 - Bianchi, Andrew James ;   et al.
2004-11-04
Reducing sub-threshold leakage in a memory array
App 20040156227 - Chu, Sam Gat-Shang ;   et al.
2004-08-12
Method for skipping a latch in timing-sensitive dynamic circuits of a multi-clocked system with unspecific underlap requirement
Grant 6,737,888 - Lattimore , et al. May 18, 2
2004-05-18
Apparatus and method of utilizing Alias Hit signals to detect errors within the real address tag arrays
Grant 6,640,293 - Paredes , et al. October 28, 2
2003-10-28
Method of utilizing timing models to provide data for static timing analysis of electronic circuits
App 20030009318 - Amatangelo, Matthew J. ;   et al.
2003-01-09
Data processing system including load/store unit having a real address tag array and method for correcting effective address aliasing
Grant 6,477,635 - Kahle , et al. November 5, 2
2002-11-05

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