loadpatents
name:-0.0094079971313477
name:-0.0090639591217041
name:-0.00058603286743164
Parameswaran; Pramod Patent Filings

Parameswaran; Pramod

Patent Applications and Registrations

Patent applications and USPTO patent grants for Parameswaran; Pramod.The latest application filed is for "high-voltage tolerant biasing arrangement using low-voltage devices".

Company Profile
0.13.10
  • Parameswaran; Pramod - Bangalore N/A IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Low power receiver for implementing a high voltage interface implemented with low voltage devices
Grant 8,847,657 - Kumar , et al. September 30, 2
2014-09-30
Jitter reduction in high speed low core voltage level shifter
Grant 8,816,748 - Kumar , et al. August 26, 2
2014-08-26
Impedance mismatch detection circuit
Grant 8,803,535 - Kothandaraman , et al. August 12, 2
2014-08-12
High-Voltage Tolerant Biasing Arrangement Using Low-Voltage Devices
App 20140176230 - Kumar; Pankaj ;   et al.
2014-06-26
High-voltage Tolerant Biasing Arrangement Using Low-voltage Devices
App 20140125404 - Kumar; Pankaj ;   et al.
2014-05-08
High-voltage tolerant biasing arrangement using low-voltage devices
Grant 8,704,591 - Kumar , et al. April 22, 2
2014-04-22
Low Power Receiver For Implementing A High Voltage Interface Implemented With Low Voltage Devices
App 20130342258 - Kumar; Pankaj ;   et al.
2013-12-26
Jitter Reduction In High Speed Low Core Voltage Level Shifter
App 20130328611 - Kumar; Pankaj ;   et al.
2013-12-12
Hybrid impedance compensation in a buffer circuit
Grant 8,598,941 - Bhattacharya , et al. December 3, 2
2013-12-03
AC noise suppression from a bias signal in high voltage supply/low voltage device
Grant 8,487,691 - Kumar , et al. July 16, 2
2013-07-16
Voltage level translator circuit for reducing jitter
Grant 8,427,223 - Kumar , et al. April 23, 2
2013-04-23
Voltage Level Translator Circuit for Reducing Jitter
App 20130021085 - Kumar; Pankaj ;   et al.
2013-01-24
Impedance Mismatch Detection Circuit
App 20130002267 - Kothandaraman; Makeshwar ;   et al.
2013-01-03
Hybrid Impedance Compensation in a Buffer Circuit
App 20120326768 - Bhattacharya; Dipankar ;   et al.
2012-12-27

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed