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name:-0.12758302688599
name:-0.084619998931885
name:-0.013726949691772
Paone; Phil C. Patent Filings

Paone; Phil C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Paone; Phil C..The latest application filed is for "optimizing data approximation analysis using low power circuitry".

Company Profile
14.81.76
  • Paone; Phil C. - Rochester MN
  • - Rochester MN US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Optimizing data approximation analysis using low power circuitry
Grant 11,061,645 - Erickson , et al. July 13, 2
2021-07-13
Cognitive analysis using applied analog circuits
Grant 10,802,062 - Erickson , et al. October 13, 2
2020-10-13
Real time cognitive monitoring of correlations between variables
Grant 10,670,642 - Erickson , et al.
2020-06-02
Real time cognitive monitoring of correlations between variables
Grant 10,663,502 - Erickson , et al.
2020-05-26
Cognitive analysis using applied analog circuits
Grant 10,598,710 - Erickson , et al.
2020-03-24
Predicting data correlation using multivalued logical outputs in static random access memory (SRAM) storage cells
Grant 10,418,094 - Erickson , et al. Sept
2019-09-17
Method for low power operation and test using DRAM device
Grant 10,304,522 - Erickson , et al.
2019-05-28
Generating a unique die identifier for an electronic chip
Grant 10,236,887 - Erickson , et al.
2019-03-19
Optimizing data approximation analysis using low power circuitry
Grant 10,236,050 - Erickson , et al.
2019-03-19
Optimizing data approximation analysis using low bower circuitry
Grant 10,224,089 - Erickson , et al.
2019-03-05
Cognitive Analysis Using Applied Analog Circuits
App 20180348271 - ERICKSON; KARL R. ;   et al.
2018-12-06
Real Time Cognitive Reasoning Using A Circuit With Varying Confidence Level Alerts
App 20180349774 - ERICKSON; KARL R. ;   et al.
2018-12-06
Real Time Cognitive Reasoning Using A Circuit With Varying Confidence Level Alerts
App 20180349775 - ERICKSON; KARL R. ;   et al.
2018-12-06
Cognitive Analysis Using Applied Analog Circuits
App 20180348273 - ERICKSON; KARL R. ;   et al.
2018-12-06
Real Time Cognitive Monitoring Of Correlations Between Variables
App 20180348272 - ERICKSON; KARL R. ;   et al.
2018-12-06
Optimizing Data Approximation Analysis Using Low Power Circuitry
App 20180350423 - ERICKSON; KARL R. ;   et al.
2018-12-06
Real Time Cognitive Monitoring Of Correlations Between Variables
App 20180348274 - ERICKSON; KARL R. ;   et al.
2018-12-06
Optimizing data approximation analysis using low power circuitry
App 20180350422 - ERICKSON; KARL R. ;   et al.
2018-12-06
Implementing eFuse visual security of stored data using EDRAM
Grant 10,121,530 - Christensen , et al. November 6, 2
2018-11-06
System for testing charge trap memory cells
Grant 10,090,063 - Erickson , et al. October 2, 2
2018-10-02
Optimizing Data Approximation Analysis Using Low Power Circuitry
App 20180239586 - ERICKSON; KARL R. ;   et al.
2018-08-23
Predicting Data Correlation Using Multivalued Logical Outputs In Static Random Access Memory (sram) Storage Cells
App 20180240512 - ERICKSON; KARL R. ;   et al.
2018-08-23
Optimizing data approximation analysis using low power circuitry
Grant 10,043,568 - Erickson , et al. August 7, 2
2018-08-07
Method for low power operation and test using DRAM device
App 20180218766 - ERICKSON; KARL R. ;   et al.
2018-08-02
Optimizing data approximation analysis using low power circuitry
Grant 10,037,792 - Erickson , et al. July 31, 2
2018-07-31
Generating A Unique Die Identifier For An Electronic Chip
App 20180149696 - ERICKSON; KARL R. ;   et al.
2018-05-31
Implementing hidden security key in eFuses
Grant 9,953,720 - Erickson , et al. April 24, 2
2018-04-24
Predicting data correlation using multivalued logical outputs in static random access memory (SRAM) storage cells
Grant 9,916,890 - Erickson , et al. March 13, 2
2018-03-13
Generating a unique die identifier for an electronic chip
Grant 9,864,006 - Erickson , et al. January 9, 2
2018-01-09
Implementing Efuse Visual Security Of Stored Data Using Edram
App 20170236571 - Christensen; Todd A. ;   et al.
2017-08-17
Implementing resistance defect performance mitigation using test signature directed self heating and increased voltage
Grant 9,721,856 - Erickson , et al. August 1, 2
2017-08-01
Side gate assist in metal gate first process
Grant 9,685,526 - Erickson , et al. June 20, 2
2017-06-20
System For Testing Charge Trap Memory Cells
App 20170169904 - ERICKSON; Karl R. ;   et al.
2017-06-15
System For Testing Charge Trap Memory Cells
App 20170169903 - Erickson; Karl R. ;   et al.
2017-06-15
System for testing charge trap memory cells
Grant 9,666,305 - Erickson , et al. May 30, 2
2017-05-30
Implementing Efuse Visual Security Of Stored Data Using Edram
App 20170148527 - Christensen; Todd A. ;   et al.
2017-05-25
Implementing eFuse visual security of stored data using EDRAM
Grant 9,646,712 - Christensen , et al. May 9, 2
2017-05-09
Creating default states for non-volatile memory elements
Grant 9,589,653 - Erickson , et al. March 7, 2
2017-03-07
Implementing resistance defect performance mitigation using test signature directed self heating and increased voltage
Grant 9,583,403 - Erickson , et al. February 28, 2
2017-02-28
Implementing hidden security key in eFuses
Grant 9,570,193 - Erickson , et al. February 14, 2
2017-02-14
Implementing Resistance Defect Performance Mitigation Using Test Signature Directed Self Heating And Increased Voltage
App 20160379899 - Erickson; Karl R. ;   et al.
2016-12-29
Implementing Resistance Defect Performance Mitigation Using Test Signature Directed Self Heating And Increased Voltage
App 20160379898 - Erickson; Karl R. ;   et al.
2016-12-29
Implementing eFuse visual security of stored data using EDRAM
Grant 9,514,841 - Christensen , et al. December 6, 2
2016-12-06
Sensing of non-volatile memory cell having two complementary memory transistors
Grant 9,496,045 - Kilker , et al. November 15, 2
2016-11-15
Structure for metal oxide semiconductor capacitor
Grant 9,443,767 - Erickson , et al. September 13, 2
2016-09-13
Detection of initial state by eFuse array
Grant 9,424,948 - Erickson , et al. August 23, 2
2016-08-23
Sensing circuit for a non-volatile memory cell having two complementary memory transistors
Grant 9,378,836 - Kilker , et al. June 28, 2
2016-06-28
Implementing Hidden Security Key In Efuses
App 20160180961 - Erickson; Karl R. ;   et al.
2016-06-23
Non-volatile Memory Sense Circuit
App 20160180944 - Kilker; Robert E. ;   et al.
2016-06-23
Implementing Hidden Security Key In Efuses
App 20160180962 - Erickson; Karl R. ;   et al.
2016-06-23
Sensing Circuit For A Non-volatile Memory Cell Having Two Complementary Memory Transistors
App 20160180943 - Kilker; Robert E. ;   et al.
2016-06-23
Design Structure For Metal Oxide Semiconductor Capacitor
App 20160172249 - Erickson; Karl R. ;   et al.
2016-06-16
Precision Intralevel Metal Capacitor Fabrication
App 20160148991 - Erickson; Karl R. ;   et al.
2016-05-26
Precision Intralevel Metal Capacitor Fabrication
App 20160148868 - Erickson; Karl R. ;   et al.
2016-05-26
Implementing buried FET utilizing drain of finFET as gate of buried FET
Grant 9,312,272 - Erickson , et al. April 12, 2
2016-04-12
Semiconductor chip with power gating through silicon vias
Grant 9,252,083 - Erickson , et al. February 2, 2
2016-02-02
Structure for metal oxide semiconductor capacitor
Grant 9,245,884 - Erickson , et al. January 26, 2
2016-01-26
Side Gate Assist In Metal Gate First Process
App 20150228757 - Erickson; Karl R. ;   et al.
2015-08-13
Capacitor backup for SRAM
Grant 9,099,164 - Erickson , et al. August 4, 2
2015-08-04
Implementing gate within a gate utilizing replacement metal gate process
Grant 9,093,421 - Erickson , et al. July 28, 2
2015-07-28
Implementing Buried Fet Below And Beside Finfet On Bulk Substrate
App 20150206878 - Erickson; Karl R. ;   et al.
2015-07-23
Implementing buried FET below and beside FinFET on bulk substrate
Grant 9,059,020 - Erickson , et al. June 16, 2
2015-06-16
Method of implementing buried FET below and beside FinFET on bulk substrate
Grant 9,059,307 - Erickson , et al. June 16, 2
2015-06-16
Semiconductor Chip With Power Gating Through Silicon Vias
App 20150162266 - Erickson; Karl R. ;   et al.
2015-06-11
Electronic fuse cell and array
Grant 9,053,889 - Kirihata , et al. June 9, 2
2015-06-09
Method Of Implementing Buried Fet Below And Beside Finfet On Bulk Substrate
App 20150155206 - Erickson; Karl R. ;   et al.
2015-06-04
Implementing Buried Fet Below And Beside Finfet On Bulk Substrate
App 20150155280 - Erickson; Karl R. ;   et al.
2015-06-04
Interdigitated finFETs
Grant 9,048,123 - Erickson , et al. June 2, 2
2015-06-02
Implementing Buried Fet Utilizing Drain Of Finfet As Gate Of Buried Fet
App 20150145047 - Erickson; Karl R. ;   et al.
2015-05-28
Semiconductor chip with power gating through silicon vias
Grant 9,040,406 - Erickson , et al. May 26, 2
2015-05-26
FinFET with body contact
Grant 9,024,387 - Erickson , et al. May 5, 2
2015-05-05
Plural differential pair employing FinFET structure
Grant 9,018,713 - Erickson , et al. April 28, 2
2015-04-28
Interdigitated Finfets
App 20150076615 - Erickson; Karl R. ;   et al.
2015-03-19
Capacitor backup for SRAM
Grant 8,953,365 - Erickson , et al. February 10, 2
2015-02-10
Precision IC resistor fabrication
Grant 8,921,199 - Erickson , et al. December 30, 2
2014-12-30
Precision IC resistor fabrication
Grant 08921199 -
2014-12-30
Capacitor Backup For Sram
App 20140362635 - Erickson; Karl R. ;   et al.
2014-12-11
Capacitor Backup For Sram
App 20140362636 - Erickson; Karl R. ;   et al.
2014-12-11
Implementing enhanced power supply distribution and decoupling utilizing TSV exclusion zone
Grant 8,895,436 - Erickson , et al. November 25, 2
2014-11-25
Soft error detection
Grant 8,890,083 - Paone , et al. November 18, 2
2014-11-18
Semiconductor Chip With Power Gating Through Silicon Vias
App 20140264332 - Erickson; Karl R. ;   et al.
2014-09-18
Electronic Fuse Cell And Array
App 20140253220 - Kirihata; Toshiaki ;   et al.
2014-09-11
Independently voltage controlled volume of silicon on a silicon on insulator chip
Grant 8,816,470 - Erickson , et al. August 26, 2
2014-08-26
Gateless Finfet
App 20140183640 - Erickson; Karl R. ;   et al.
2014-07-03
Semiconductor chip with power gating through silicon vias
Grant 8,754,499 - Erickson , et al. June 17, 2
2014-06-17
Implementing Enhanced Power Supply Distribution And Decoupling Utilizing Tsv Exclusion Zone
App 20140151896 - Erickson; Karl R. ;   et al.
2014-06-05
Implementing semiconductor soc with metal via gate node high performance stacked transistors
Grant 8,735,975 - Erickson , et al. May 27, 2
2014-05-27
Enhanced thin film field effect transistor integration into back end of line
Grant 08617939 -
2013-12-31
Enhanced thin film field effect transistor integration into back end of line
Grant 8,617,939 - Erickson , et al. December 31, 2
2013-12-31
Plural Differential Pair Employing FinFET Structure
App 20130341733 - Erickson; Karl R. ;   et al.
2013-12-26
Implementing Gate Within A Gate Utilizing Replacement Metal Gate Process
App 20130341720 - Erickson; Karl R. ;   et al.
2013-12-26
FinFET with Body Contact
App 20130341724 - Erickson; Karl R. ;   et al.
2013-12-26
Implementing Isolated Silicon Regions In Silicon-on-insulator (soi) Wafers Using Bonded-wafer Technique
App 20130328159 - Erickson; Karl R. ;   et al.
2013-12-12
Soft Error Detection
App 20130313441 - Paone; Phil C. ;   et al.
2013-11-28
Deep trench embedded gate transistor
Grant 8,592,921 - Erickson , et al. November 26, 2
2013-11-26
Implementing vertical signal repeater transistors utilizing wire vias as gate nodes
Grant 8,575,613 - Erickson , et al. November 5, 2
2013-11-05
Utilizing Gate Phases For Circuit Tuning
App 20130263075 - Erickson; Karl R. ;   et al.
2013-10-03
Utilizing gate phases for circuit tuning
Grant 8,539,425 - Erickson , et al. September 17, 2
2013-09-17
eDRAM having dynamic retention and performance tradeoff
Grant 8,525,245 - Erickson , et al. September 3, 2
2013-09-03
Vertically stacked FETs with series bipolar junction transistor
Grant 8,492,220 - Erickson , et al. July 23, 2
2013-07-23
Implementing eFuse circuit with enhanced eFuse blow operation
Grant 8,492,207 - Erickson , et al. July 23, 2
2013-07-23
Deep Trench Embedded Gate Transistor
App 20130146992 - Erickson; Karl R. ;   et al.
2013-06-13
Implementing temporary disable function of protected circuitry by modulating threshold voltage of timing sensitive circuit
Grant 8,456,187 - Erickson , et al. June 4, 2
2013-06-04
Implementing Semiconductor Soc With Metal Via Gate Node High Performance Stacked Transistors
App 20130126881 - Erickson; Karl R. ;   et al.
2013-05-23
Implementing semiconductor SoC with metal via gate node high performance stacked transistors
Grant 8,435,851 - Erickson , et al. May 7, 2
2013-05-07
Implementing Vertical Signal Repeater Transistors Utilizing Wire Vias As Gate Nodes
App 20130082268 - Erickson; Karl R. ;   et al.
2013-04-04
Implementing vertical signal repeater transistors utilizing wire vias as gate nodes
Grant 8,395,186 - Erickson , et al. March 12, 2
2013-03-12
Implementing hacking detection and block function at indeterminate times with priorities and limits
Grant 8,384,414 - Erickson , et al. February 26, 2
2013-02-26
Structure Having Three Independent Finfet Transistors
App 20130043544 - Erickson; Karl R. ;   et al.
2013-02-21
Implementing Temporary Disable Function Of Protected Circuitry By Modulating Threshold Voltage Of Timing Sensitive Circuit
App 20120268160 - Erickson; Karl R. ;   et al.
2012-10-25
Independently Voltage Controlled Volume Of Silicon On A Silicon On Insulator Chip
App 20120267752 - Erickson; Karl R. ;   et al.
2012-10-25
eDRAM HAVING DYNAMIC RETENTION AND PERFORMANCE TRADEOFF
App 20120267697 - Erickson; Karl R. ;   et al.
2012-10-25
IMPLEMENTING eFUSE CIRCUIT WITH ENHANCED eFUSE BLOW OPERATION
App 20120268195 - Erickson; Karl R. ;   et al.
2012-10-25
Implementing Hacking Detection And Block Function At Indeterminate Times With Priorities And Limits
App 20120216301 - Erickson; Karl R. ;   et al.
2012-08-23
Implementing Semiconductor Soc With Metal Via Gate Node High Performance Stacked Transistors
App 20120175626 - Erickson; Karl R. ;   et al.
2012-07-12
Implementing Vertical Signal Repeater Transistors Utilizing Wire Vias As Gate Nodes
App 20120175624 - Erickson; Karl R. ;   et al.
2012-07-12
Enhanced Thin Film Field Effect Transistor Integration into Back End of Line
App 20120126330 - Erickson; Karl R. ;   et al.
2012-05-24
Vertically Stacked FETs With Series Bipolar Junction Transistor
App 20120032274 - Erickson; Karl R. ;   et al.
2012-02-09
Vertical Stacking of Field Effect Transistor Structures for Logic Gates
App 20110298052 - Erickson; Karl R. ;   et al.
2011-12-08
Implementing APS voltage level activation with secondary chip in stacked-chip technology
Grant 7,865,859 - Paone , et al. January 4, 2
2011-01-04
Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
Grant 7,550,789 - Bonaccio , et al. June 23, 2
2009-06-23
Non volatile memory RAD-hard (NVM-rh) system
Grant 7,551,470 - Erickson , et al. June 23, 2
2009-06-23
Electrically programmable fuse sense circuit
Grant 7,532,057 - Aipperspach , et al. May 12, 2
2009-05-12
Method and Apparatus for Implementing APS Voltage Level Activation With Secondary Chip in Stacked-Chip Technology
App 20080266736 - Paone; Phil C. ;   et al.
2008-10-30
Method and Apparatus for Implementing APS Voltage Level Activation With Secondary Chip in Stacked-Chip Technology
App 20080266735 - Paone; Phil C. ;   et al.
2008-10-30
Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
Grant 7,442,583 - Bonaccio , et al. October 28, 2
2008-10-28
Electrically Programmable Fuse Sense Circuit
App 20080157851 - Aipperspach; Anthony Gus ;   et al.
2008-07-03
Using Electrically Programmable Fuses To Hide Architecture, Prevent Reverse Engineering, And Make A Device Inoperable
App 20080143373 - BONACCIO; Anthony R. ;   et al.
2008-06-19
Non Volatile Memory RAD-hard (NVM-rh) System
App 20080094896 - Erickson; Karl R. ;   et al.
2008-04-24
Changing Chip Function Based on Fuse States
App 20080061817 - Erickson; Karl R. ;   et al.
2008-03-13
Changing chip function based on fuse states
Grant 7,336,095 - Erickson , et al. February 26, 2
2008-02-26
Changing Chip Function Based On Fuse States
App 20070241768 - ERICKSON; KARL R. ;   et al.
2007-10-18
Changing chip function based on fuse states
Grant 7,268,577 - Erickson , et al. September 11, 2
2007-09-11
Changing chip function based on fuse states
App 20060131743 - Erickson; Karl R. ;   et al.
2006-06-22
Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
App 20060136751 - Bonaccio; Anthony R. ;   et al.
2006-06-22
Utilizing fuses to store control parameters for external system components
App 20060136858 - Erickson; Karl R. ;   et al.
2006-06-22

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