Pang; Chan-Sui

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pang; Chan-Sui.The latest application filed is for "immunoassay for specific determination of s-adenosylmethionine and analogs thereof in biological samples".

Company Profile

0.10.6

Pang; Chan-Sui - Sunnyvale CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Immunoassay for specific determination of S-adenosylmethionine and analogs thereof in biological samples App 20090263879 - Chang; Chiu Chin ; et al.	2009-10-22
Word line compensation in non-volatile memory erase operations Grant 7,606,074 - Wan , et al. October 20, 2	2009-10-20
Word Line Compensation In Non-Volatile Memory Erase Operations App 20090021983 - Wan; Jun ; et al.	2009-01-22
Word line compensation in non-volatile memory erase operations Grant 7,450,433 - Wan , et al. November 11, 2	2008-11-11
Word line compensation in non-volatile memory erase operations App 20060140012 - Wan; Jun ; et al.	2006-06-29
Flash memory programming using gate induced junction leakage current Grant 7,057,931 - Lutze , et al. June 6, 2	2006-06-06
Flash memory programming using gate induced junction leakage current App 20050099849 - Lutze, Jeffrey W. ; et al.	2005-05-12
Dual-bit double-polysilicon source-side injection flash EEPROM cell Grant 6,798,012 - Ma , et al. September 28, 2	2004-09-28
Method of operation of a dual-bit double-polysilicon source-side injection flash EEPROM cell Grant 6,714,454 - Ma , et al. March 30, 2	2004-03-30
Method for erasing a nonvolatile memory cell formed in a body region of a substrate App 20030071301 - Wald, Keith R. ; et al.	2003-04-17
Method of operation of a dual-bit double-polysilicon source-side injection flash EEPROM cell App 20030057474 - Ma, Yueh Yale ; et al.	2003-03-27
Method for operating nonvolatile memory cells Grant 6,493,262 - Wald , et al. December 10, 2	2002-12-10
Programming current limiter for source-side injection EEPROM cells Grant 5,986,941 - Pang , et al. November 16, 1	1999-11-16
Switch driver circuit for providing small sector sizes for negative gate erase flash EEPROMS using a standard twin-well CMOS process Grant 5,663,907 - Frayer , et al. September 2, 1	1997-09-02
Memory array architecture for flash memory Grant 5,185,718 - Rinerson , et al. February 9, 1	1993-02-09
High density EEPROM cell and process for making the cell Grant 5,033,023 - Hsia , et al. July 16, 1	1991-07-16

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