loadpatents
name:-0.012996912002563
name:-0.0079050064086914
name:-0.0046210289001465
Panesar; Gajinder Patent Filings

Panesar; Gajinder

Patent Applications and Registrations

Patent applications and USPTO patent grants for Panesar; Gajinder.The latest application filed is for "monitoring processors operating in lockstep".

Company Profile
4.7.10
  • Panesar; Gajinder - Bristol GB
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Monitoring processors operating in lockstep
Grant 11,221,901 - Panesar , et al. January 11, 2
2022-01-11
Monitoring Processors Operating in Lockstep
App 20210157667 - Panesar; Gajinder ;   et al.
2021-05-27
Message Monitoring
App 20210103537 - Panesar; Gajinder ;   et al.
2021-04-08
Error Detection Within An Integrated Circuit Chip
App 20200089562 - Panesar; Gajinder
2020-03-19
Integrated circuit security
Grant 10,394,721 - Panesar , et al. A
2019-08-27
Integrated Circuit Security
App 20170153988 - Panesar; Gajinder ;   et al.
2017-06-01
SIMD array operable to process different respective packet protocols simultaneously while executing a single common instruction stream
Grant 8,127,112 - Rhoades , et al. February 28, 2
2012-02-28
Communications in a processor array
Grant 7,987,340 - Panesar , et al. July 26, 2
2011-07-26
Data Processing Architectures For Packet Handling
App 20110083000 - Rhoades; John ;   et al.
2011-04-07
Data processing architectures for packet handling using a SIMD array
Grant 7,917,727 - Rhoades , et al. March 29, 2
2011-03-29
Data processing architectures for packet handling wherein batches of data packets of unpredictable size are distributed across processing elements arranged in a SIMD array operable to process different respective packet protocols at once while executing a single common instruction stream
Grant 7,856,543 - Rhoades , et al. December 21, 2
2010-12-21
Data processing architectures
Grant 7,818,541 - Rhoades , et al. October 19, 2
2010-10-19
Data Processing Architectures
App 20070217453 - Rhoades; John ;   et al.
2007-09-20
Data Processing Architectures
App 20070220232 - Rhoades; John ;   et al.
2007-09-20
Communications in a processor array
App 20070083791 - Panesar; Gajinder ;   et al.
2007-04-12
Processor architecture
App 20060155958 - Duller; Andrew ;   et al.
2006-07-13
Data processing architectures
App 20030041163 - Rhoades, John ;   et al.
2003-02-27

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed