| Patent | Date |
|---|
Network Transceiver With Vga Channel Specific Equalization
App 20220302951 - PANDITA; Bupesh | 2022-09-22 |
Low-power, low-latency time-to-digital-converter-based serial link
Grant 10,965,442 - Hailu , et al. March 30, 2 | 2021-03-30 |
Low-power, Low-latency Time-to-digital-converter-based Serial Link
App 20200106597 - Hailu; Eskinder ; et al. | 2020-04-02 |
Quadrature Clock Generation With Injection Locking
App 20190363674 - PANDITA; Bupesh ; et al. | 2019-11-28 |
Quadrature clock generation with injection locking
Grant 10,476,434 - Pandita , et al. Nov | 2019-11-12 |
Serializer-deserializer with frequency doubler
Grant 10,419,204 - Hailu , et al. Sept | 2019-09-17 |
SerDes with adaptive clock data recovery
Grant 10,389,366 - Hailu , et al. A | 2019-08-20 |
Hybrid phase-locked loop
Grant 10,355,702 - Gao , et al. July 16, 2 | 2019-07-16 |
Apparatus and method for frequency calibration of voltage controlled oscillator (VCO) including determining VCO frequency range
Grant 10,355,701 - Pandita , et al. July 16, 2 | 2019-07-16 |
Apparatus And Method For Frequency Calibration Of Voltage Controlled Oscillator (vco) Including Determining Vco Frequency Range
App 20190052278 - Pandita; Bupesh ; et al. | 2019-02-14 |
Hybrid Phase-locked Loop
App 20190028108 - Gao; Zhuo ; et al. | 2019-01-24 |
Serializer-deserializer With Frequency Doubler
App 20190013929 - Hailu; Eskinder ; et al. | 2019-01-10 |
Serdes With Adaptive Clock Data Recovery
App 20190007053 - Hailu; Eskinder ; et al. | 2019-01-03 |
Delay locked loop (DLL) employing pulse to digital converter (PDC) for calibration
Grant 9,998,126 - Hailu , et al. June 12, 2 | 2018-06-12 |
Pulse to digital converter
Grant 9,971,312 - Hailu , et al. May 15, 2 | 2018-05-15 |
Gate Boosted Low Drop Regulator
App 20170285675 - Gao; Zhuo ; et al. | 2017-10-05 |
Gate boosted low drop regulator
Grant 9,778,672 - Gao , et al. October 3, 2 | 2017-10-03 |
Apparatus and method for in situ analog signal diagnostic and debugging with calibrated analog-to-digital converter
Grant 9,729,163 - Song , et al. August 8, 2 | 2017-08-08 |
Apparatus And Method For Combining Currents From Passive Equalizer In Sense Amplifier
App 20170104616 - Hailu; Eskinder ; et al. | 2017-04-13 |
Apparatus and method for combining currents from passive equalizer in sense amplifier
Grant 9,602,317 - Hailu , et al. March 21, 2 | 2017-03-21 |
Fractional phase locked loop (PLL) architecture
Grant 9,577,646 - Pandita , et al. February 21, 2 | 2017-02-21 |
New Fractional Phase Locked Loop (pll) Architecture
App 20170041005 - Pandita; Bupesh ; et al. | 2017-02-09 |
Linear equalizer with variable gain
Grant 9,520,872 - Pandita December 13, 2 | 2016-12-13 |
Phase locked loop (PLL) architecture
Grant 9,485,085 - Arcudia , et al. November 1, 2 | 2016-11-01 |
Novel Phase Locked Loop (pll) Architecture
App 20160269172 - Arcudia; Kenneth Luis ; et al. | 2016-09-15 |
Built-in Test Structure For A Receiver
App 20160216317 - Chen; Minhan ; et al. | 2016-07-28 |
Linear Equalizer With Variable Gain
App 20160182038 - Pandita; Bupesh | 2016-06-23 |
| 