Pandit; Panthini

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pandit; Panthini.The latest application filed is for "method and system for input/output processing for write through to enable hardware acceleration".

Company Profile

8.10.13

Pandit; Panthini - Bangalore IN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and system for hardware accelerated row lock for a write back volume Grant 10,649,906 - Simionescu , et al.	2020-05-12
Method And System For Input/output Processing For Write Through To Enable Hardware Acceleration App 20200057576 - Simionescu; Horia ; et al.	2020-02-20
Method and system for handling bad blocks in a hardware accelerated caching solution Grant 10,528,438 - Simionescu , et al. J	2020-01-07
Method And System For Hardware Accelerated Row Lock For A Write Back Volume App 20190332541 - Simionescu; Horia ; et al.	2019-10-31
Method and system for hardware accelerated copyback Grant 10,394,673 - Simionescu , et al. A	2019-08-27
Method and system for hardware accelerated cache flush Grant 10,282,116 - Simionescu , et al.	2019-05-07
Method and system for hardware accelerated read-ahead caching Grant 10,282,301 - Simionescu , et al.	2019-05-07
Method and system for efficient cache buffering supporting variable stripe sizes to enable hardware acceleration Grant 10,223,009 - Simionescu , et al.	2019-03-05
Method And System For Hardware Accelerated Cache Flush App 20190026033 - Simionescu; Horia ; et al.	2019-01-24
Method And System For Handling Bad Blocks In A Hardware Accelerated Caching Solution App 20180341564 - Simionescu; Horia ; et al.	2018-11-29
Method And System For Hardware Accelerated Copyback App 20180335963 - Simionescu; Horia ; et al.	2018-11-22
Method And System For Hardware Accelerated Read-ahead Caching App 20180336138 - Simionescu; Horia ; et al.	2018-11-22
Method and system for efficient cache buffering in a system having parity arms to enable hardware acceleration Grant 10,108,359 - Simionescu , et al. October 23, 2	2018-10-23
Memory controller utilizing scatter gather list techniques Grant 10,078,460 - Simionescu , et al. September 18, 2	2018-09-18
Method And System For Efficient Variable Length Memory Frame Allocation App 20180113639 - Simionescu; Horia ; et al.	2018-04-26
Method And System For Efficient Cache Buffering Supporting Variable Stripe Sizes To Enable Hardware Acceleration App 20180113634 - Simionescu; Horia ; et al.	2018-04-26
Method And System For Efficient Cache Buffering In A System Having Parity Arms To Enable Hardware Acceleration App 20180113633 - Simionescu; Horia ; et al.	2018-04-26
Memory Controller Utilizing Scatter Gather List Techniques App 20180113635 - Simionescu; Horia ; et al.	2018-04-26
Method And System For Efficient Hashing Optimized For Hardware Accelerated Caching App 20180113810 - Simionescu; Horia ; et al.	2018-04-26
Storage controller cache memory operations that forego region locking Grant 9,910,798 - Simionescu , et al. March 6, 2	2018-03-06
Space efficient formats for scatter gather lists Grant 9,910,797 - Simionescu , et al. March 6, 2	2018-03-06
Space Efficient Formats For Scatter Gather Lists App 20170097908 - Simionescu; Horia Cristian ; et al.	2017-04-06
Storage Controller Cache Memory Operations That Forego Region Locking App 20170097909 - Simionescu; Horia Cristian ; et al.	2017-04-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.