loadpatents
Patent applications and USPTO patent grants for Pan; Philip.The latest application filed is for "multiple data rate interface architecture".
Patent | Date |
---|---|
Scaleable look-up table based memory Grant 9,548,103 - Pan , et al. January 17, 2 | 2017-01-17 |
Multiple data rate interface architecture Grant 9,166,589 - Pan , et al. October 20, 2 | 2015-10-20 |
Scaleable look-up table based memory Grant 9,123,437 - Pan , et al. September 1, 2 | 2015-09-01 |
Method and apparatus to minimize clock tree skew in ICs Grant 8,819,607 - Pan , et al. August 26, 2 | 2014-08-26 |
Multiple Data Rate Interface Architecture App 20140049287 - Pan; Philip ;   et al. | 2014-02-20 |
Scaleable look-up table based memory Grant 8,644,100 - Pan , et al. February 4, 2 | 2014-02-04 |
High performance memory interface circuit architecture Grant 8,593,195 - Huang , et al. November 26, 2 | 2013-11-26 |
Multiple data rate interface architecture Grant 8,575,957 - Pan , et al. November 5, 2 | 2013-11-05 |
Programmable high-speed interface Grant 8,487,665 - Wang , et al. July 16, 2 | 2013-07-16 |
High-performance memory interface circuit architecture Grant 8,305,121 - Huang , et al. November 6, 2 | 2012-11-06 |
Multiple Data Rate Interface Architecture App 20120146700 - Pan; Philip ;   et al. | 2012-06-14 |
Scaleable Look-up Table Based Memory App 20120039142 - Pan; Philip ;   et al. | 2012-02-16 |
Multiple data rate interface architecture Grant 8,098,082 - Pan , et al. January 17, 2 | 2012-01-17 |
Scaleable look-up table based memory Grant 8,064,280 - Pan , et al. November 22, 2 | 2011-11-22 |
Programmable High-speed Interface App 20110227606 - Wang; Bonnie I. ;   et al. | 2011-09-22 |
High-performance memory interface circuit architecture Grant 7,969,215 - Huang , et al. June 28, 2 | 2011-06-28 |
Multiple data rate interface architecture Grant 7,859,304 - Pan , et al. December 28, 2 | 2010-12-28 |
Apparatus and method for the arithmetic over-ride of look up table outputs in a programmable logic device Grant 7,812,633 - Lee , et al. October 12, 2 | 2010-10-12 |
Look-up table based memory Grant 7,768,430 - Pan , et al. August 3, 2 | 2010-08-03 |
Self-compensating delay chain for multiple-date-rate interfaces Grant 7,725,755 - Chong , et al. May 25, 2 | 2010-05-25 |
Input buffer for multiple differential I/O standards Grant 7,710,149 - Chung , et al. May 4, 2 | 2010-05-04 |
Programmable High-speed Interface App 20100045349 - Wang; Bonnie I. ;   et al. | 2010-02-25 |
Distributed memory in field-programmable gate array integrated circuit devices Grant 7,656,191 - Lewis , et al. February 2, 2 | 2010-02-02 |
Programmable high-speed interface Grant 7,586,341 - Wang , et al. September 8, 2 | 2009-09-08 |
High-performance memory interface circuit architecture Grant 7,535,275 - Huang , et al. May 19, 2 | 2009-05-19 |
Memory circuitry with data validation Grant 7,487,415 - Pan February 3, 2 | 2009-02-03 |
Multiple data rate interface architecture Grant 7,477,074 - Pan , et al. January 13, 2 | 2009-01-13 |
Implementation of double data rate embedded memory in programmable devices Grant 7,460,431 - Pan , et al. December 2, 2 | 2008-12-02 |
Distributed memory in field-programmable gate array integrated circuit devices App 20080231316 - Lewis; David ;   et al. | 2008-09-25 |
Input buffer for multiple differential I/O standards Grant 7,425,844 - Chung , et al. September 16, 2 | 2008-09-16 |
Programmable High-speed Interface App 20080186056 - Wang; Bonnie I. ;   et al. | 2008-08-07 |
Distributed memory in field-programmable gate array integrated circuit devices Grant 7,391,236 - Lewis , et al. June 24, 2 | 2008-06-24 |
Apparatus and methods for providing redundancy in integrated circuits Grant 7,321,518 - Huang , et al. January 22, 2 | 2008-01-22 |
Programmable high speed interface Grant 7,315,188 - Wang , et al. January 1, 2 | 2008-01-01 |
Distributed memory in field-programmable gate array integrated circuit devices App 20070146178 - Lewis; David ;   et al. | 2007-06-28 |
Control circuit for self-compensating delay chain for multiple-data-rate interfaces Grant 7,231,536 - Chong , et al. June 12, 2 | 2007-06-12 |
High-performance memory interface circuit architecture Grant 7,227,395 - Huang , et al. June 5, 2 | 2007-06-05 |
Input buffer for multiple differential I/O standards Grant 7,215,143 - Chung , et al. May 8, 2 | 2007-05-08 |
Loop circuitry with low-pass noise filter Grant 7,205,806 - Chong , et al. April 17, 2 | 2007-04-17 |
Self-compensating delay chain for multiple-date-rate interfaces Grant 7,200,769 - Chong , et al. April 3, 2 | 2007-04-03 |
Multiple data rate interface architecture Grant 7,167,023 - Pan , et al. January 23, 2 | 2007-01-23 |
Supply voltage detection circuit Grant 7,119,579 - Chong , et al. October 10, 2 | 2006-10-10 |
Programmable high speed interface App 20060220703 - Wang; Bonnie I. ;   et al. | 2006-10-05 |
Programmable high speed I/O interface Grant 7,116,135 - Wang , et al. October 3, 2 | 2006-10-03 |
Loop circuitry with low-pass noise filter App 20060164139 - Chong; Yan ;   et al. | 2006-07-27 |
Address control for efficient memory partition Grant 7,057,962 - Tan , et al. June 6, 2 | 2006-06-06 |
Loop circuitry with low-pass noise filter Grant 7,002,384 - Chong , et al. February 21, 2 | 2006-02-21 |
Supply voltage detection circuit App 20050253626 - Chong, Yan ;   et al. | 2005-11-17 |
Techniques for implementing address recycling in memory circuits Grant 6,961,280 - Pan , et al. November 1, 2 | 2005-11-01 |
Multiple data rate interface architecture Grant 6,946,872 - Pan , et al. September 20, 2 | 2005-09-20 |
Techniques for preloading data into memory on programmable circuits Grant 6,912,164 - Chong , et al. June 28, 2 | 2005-06-28 |
On/off reference voltage switch for multiple I/O standards Grant 6,911,860 - Wang , et al. June 28, 2 | 2005-06-28 |
Programmable high speed I/O interface App 20050134332 - Wang, Bonnie I. ;   et al. | 2005-06-23 |
Supply voltage detection circuit Grant 6,870,400 - Chong , et al. March 22, 2 | 2005-03-22 |
Schmitt trigger circuit with adjustable trip point voltages Grant 6,870,413 - Chang , et al. March 22, 2 | 2005-03-22 |
Programmable high speed I/O interface Grant 6,825,698 - Wang , et al. November 30, 2 | 2004-11-30 |
Input buffer for multiple differential I/O standards Grant 6,825,692 - Chung , et al. November 30, 2 | 2004-11-30 |
Multiple data rate interface architecture Grant 6,806,733 - Pan , et al. October 19, 2 | 2004-10-19 |
Parallel programming of programmable logic using register chains Grant 6,766,505 - Rangan , et al. July 20, 2 | 2004-07-20 |
Programmable, staged, bus hold and weak pull-up for bi-directional I/O Grant 6,731,137 - Rangan , et al. May 4, 2 | 2004-05-04 |
Hi-speed parallel configuration of programmable logic Grant 6,714,044 - Rangan , et al. March 30, 2 | 2004-03-30 |
Supply voltage detection circuit Grant 6,630,844 - Chong , et al. October 7, 2 | 2003-10-07 |
Programmable high speed I/O interface App 20030042941 - Wang, Bonnie I. ;   et al. | 2003-03-06 |
Programmable logic integrated circuit devices with differential signaling capabilities Grant 6,433,579 - Wang , et al. August 13, 2 | 2002-08-13 |
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