Pan; Jui-Yu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pan; Jui-Yu.The latest application filed is for "bit line and word line connection for memory array".

Company Profile

8.9.12

Pan; Jui-Yu - Neipu Township TW
Pan; Jui-Yu - Pingtung County TW
Pan; Jui-Yu - Pingtung TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Bit Line And Word Line Connection For Memory Array App 20220115066 - Huang; Chang-Chih ; et al.	2022-04-14
Bit line and word line connection for memory array Grant 11,211,120 - Huang , et al. December 28, 2	2021-12-28
Bit Line And Word Line Connection For Memory Array App 20210295912 - Huang; Chang-Chih ; et al.	2021-09-23
Method To Fabricate Uniform Tunneling Dielectric Of Embedded Flash Memory Cell App 20210111182 - Pan; Jui-Yu ; et al.	2021-04-15
Integrated chip having a logic gate electrode and a tunnel dielectric layer Grant 10,879,257 - Pan , et al. December 29, 2	2020-12-29
Self-aligned double patterning (SADP) method Grant 10,872,777 - Pan , et al. December 22, 2	2020-12-22
Self-aligned Double Patterning (sadp) Method App 20200098580 - Pan; Jui-Yu ; et al.	2020-03-26
Self-aligned double patterning (SADP) method Grant 10,483,119 - Pan , et al. Nov	2019-11-19
Method to fabricate uniform tunneling dielectric of embedded flash memory cell Grant 10,269,822 - Pan , et al.	2019-04-23
Method To Fabricate Uniform Tunneling Dielectric Of Embedded Flash Memory Cell App 20190043878 - Pan; Jui-Yu ; et al.	2019-02-07
Method for manufacturing memory device and method for manufacturing shallow trench isolation Grant 9,799,755 - Yang , et al. October 24, 2	2017-10-24
Method For Manufacturing Memory Device And Method For Manufacturing Shallow Trench Isolation App 20170278953 - YANG; Tsung-Yu ; et al.	2017-09-28
Method To Fabricate Uniform Tunneling Dielectric Of Embedded Flash Memory Cell App 20170186762 - Pan; Jui-Yu ; et al.	2017-06-29
Reverse disturb immune asymmetrical sidewall floating gate devices Grant 8,334,560 - Pan , et al. December 18, 2	2012-12-18
Reverse Disturb Immune Asymmetrical Sidewall Floating Gate Devices and Methods App 20110049603 - Pan; Jui-Yu ; et al.	2011-03-03
Manufacturing Method Of Flash Memory App 20080090355 - Chuang; I-Chun ; et al.	2008-04-17
Flash memory and manufacturing method thereof Grant 7,335,940 - Chuang , et al. February 26, 2	2008-02-26
Method Of Fabricating Flash Memory App 20070128799 - Pan; Jui-Yu ; et al.	2007-06-07
Flash memory Grant 7,196,371 - Pan , et al. March 27, 2	2007-03-27
Flash Memory And Manufacturing Method Thereof App 20060275985 - Chuang; I-Chun ; et al.	2006-12-07
Flash Memory App 20060175654 - Pan; Jui-Yu ; et al.	2006-08-10

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.