loadpatents
name:-0.037822961807251
name:-0.031162023544312
name:-0.02851390838623
Pan; Hsien-Yu Patent Filings

Pan; Hsien-Yu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pan; Hsien-Yu.The latest application filed is for "method and system to balance ground bounce".

Company Profile
25.27.29
  • Pan; Hsien-Yu - Hsinchu TW
  • Pan; Hsien-Yu - Hsinchu City TW
  • PAN; Hsien-Yu - Hsinchu City 300 TW
  • Pan; Hsien-Yu - Hsin-Chu TW
  • Pan; Hsien-Yu - Pingtung County TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Static random access memory with write assist circuit
Grant 11,423,977 - Fujiwara , et al. August 23, 2
2022-08-23
Multi word line assertion
Grant 11,322,198 - Fujiwara , et al. May 3, 2
2022-05-03
Memory cell
Grant 11,176,997 - Fujiwara , et al. November 16, 2
2021-11-16
Method And System To Balance Ground Bounce
App 20210350849 - Fujiwara; Hidehiro ;   et al.
2021-11-11
Semiconductor Chip Having Memory And Logic Cells
App 20210343317 - Fujiwara; Hidehiro ;   et al.
2021-11-04
Memory Array Circuit And Method Of Manufacturing Same
App 20210272967 - FUJIWARA; Hidehiro ;   et al.
2021-09-02
Method and system to balance ground bounce
Grant 11,074,966 - Fujiwara , et al. July 27, 2
2021-07-27
Memory Array Circuit And Method Of Manufacturing Same
App 20210217742 - FUJIWARA; Hidehiro ;   et al.
2021-07-15
Semiconductor chip having memory and logic cells
Grant 11,062,739 - Fujiwara , et al. July 13, 2
2021-07-13
Memory Cell
App 20210201999 - Fujiwara; Hidehiro ;   et al.
2021-07-01
Memory cell and method of manufacturing the same
Grant 11,018,142 - Fujiwara , et al. May 25, 2
2021-05-25
SRAM cell for interleaved wordline scheme
Grant 10,971,217 - Fujiwara , et al. April 6, 2
2021-04-06
Multi Word Line Assertion
App 20210098054 - Fujiwara; Hidehiro ;   et al.
2021-04-01
Memory array circuit and method of manufacturing the same
Grant 10,964,683 - Fujiwara , et al. March 30, 2
2021-03-30
Memory cell
Grant 10,964,389 - Fujiwara , et al. March 30, 2
2021-03-30
Memory device
Grant 10,943,667 - Fujiwara , et al. March 9, 2
2021-03-09
Multi word line assertion
Grant 10,892,008 - Fujiwara , et al. January 12, 2
2021-01-12
Static Random Access Memory with Write Assist Circuit
App 20200411084 - FUJIWARA; Hidehiro ;   et al.
2020-12-31
Semiconductor Chip
App 20200411063 - Fujiwara; Hidehiro ;   et al.
2020-12-31
Sram Cell For Interleaved Wordline Scheme
App 20200372951 - Fujiwara; Hidehiro ;   et al.
2020-11-26
Variation tolerant read assist circuit for SRAM
Grant 10,832,765 - Fujiwara , et al. November 10, 2
2020-11-10
Memory Cell
App 20200321054 - Fujiwara; Hidehiro ;   et al.
2020-10-08
SRAM cell for interleaved wordline scheme
Grant 10,770,131 - Fujiwara , et al. Sep
2020-09-08
Static random access memory with write assist circuit
Grant 10,734,066 - Fujiwara , et al.
2020-08-04
Memory cell
Grant 10,714,181 - Fujiwara , et al.
2020-07-14
Method And System To Balance Ground Bounce
App 20200135268 - Fujiwara; Hidehiro ;   et al.
2020-04-30
Memory Device
App 20200135288 - Fujiwara; Hidehiro ;   et al.
2020-04-30
Memory Cell And Method Of Manufacturing The Same
App 20200020699 - FUJIWARA; Hidehiro ;   et al.
2020-01-16
Variation Tolerant Read Assist Circuit for SRAM
App 20200005858 - FUJIWARA; Hidehiro ;   et al.
2020-01-02
Multi Word Line Assertion
App 20190385671 - Fujiwara; Hidehiro ;   et al.
2019-12-19
Method of providing layout design of SRAM cell
Grant 10,510,739 - Fujiwara , et al. Dec
2019-12-17
Sram Cell For Interleaved Wordline Scheme
App 20190237134 - Fujiwara; Hidehiro ;   et al.
2019-08-01
Layout design for manufacturing a memory cell
Grant 10,276,579 - Fujiwara , et al.
2019-04-30
SRAM cell for interleaved wordline scheme
Grant 10,276,231 - Fujiwara , et al.
2019-04-30
Memory Array Circuit And Method Of Manufacturing The Same
App 20190067264 - FUJIWARA; Hidehiro ;   et al.
2019-02-28
Static Random Access Memory With Write Assist Circuit
App 20190035455 - FUJIWARA; Hidehiro ;   et al.
2019-01-31
Method Of Providing Layout Design Of Sram Cell
App 20180166433 - FUJIWARA; HIDEHIRO ;   et al.
2018-06-14
Sram Cell For Interleaved Wordline Scheme
App 20180158510 - Fujiwara; Hidehiro ;   et al.
2018-06-07
Memory Cell
App 20180151226 - FUJIWARA; Hidehiro ;   et al.
2018-05-31
SRAM cell for interleaved wordline scheme
Grant 9,886,996 - Fujiwara , et al. February 6, 2
2018-02-06
Layout scheme and method for forming device cells in semiconductor devices
Grant 9,853,035 - Pan , et al. December 26, 2
2017-12-26
Layout Design for Manufacturing a Memory Cell
App 20170271342 - Fujiwara; Hidehiro ;   et al.
2017-09-21
Sram Cell For Interleaved Wordline Scheme
App 20170110181 - Fujiwara; Hidehiro ;   et al.
2017-04-20
Layout Scheme And Method For Forming Device Cells In Semiconductor Devices
App 20150118803 - PAN; Hsien-Yu ;   et al.
2015-04-30
Layout scheme and method for forming device cells in semiconductor devices
Grant 8,928,113 - Pan , et al. January 6, 2
2015-01-06
Semiconductor memories
Grant 8,576,655 - Chan , et al. November 5, 2
2013-11-05
Sense amplifier with low sensing margin and high device variation tolerance
Grant 8,570,823 - Chen , et al. October 29, 2
2013-10-29
Semiconductor Memories
App 20120327704 - CHAN; Wei Min ;   et al.
2012-12-27
Layout Scheme And Method For Forming Device Cells In Semiconductor Devices
App 20120256235 - Pan; Hsien-Yu ;   et al.
2012-10-11
Distributed VDC for SRAM memory
Grant 8,077,517 - Wang , et al. December 13, 2
2011-12-13
Sense Amplifier With Low Sensing Margin And High Device Variation Tolerance
App 20110199847 - CHEN; Yen-Huei ;   et al.
2011-08-18
Distributed VDC for SRAM Memory
App 20100157692 - Wang; Li-Wen ;   et al.
2010-06-24
Low-power reading reference circuit for split-gate flash memory
App 20070133275 - Chang; Meng-Fan ;   et al.
2007-06-14

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