PAN; Chia-Ming

Patent Applications and Registrations

Patent applications and USPTO patent grants for PAN; Chia-Ming.The latest application filed is for "memory device and manufacturing method thereof".

Company Profile

3.7.10

PAN; Chia-Ming - Tainan City TW
Pan; Chia-Ming - Tainan TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory Device And Manufacturing Method Thereof App 20220216315 - LIN; Yu-Chu ; et al.	2022-07-07
Semiconductor Device App 20220165877 - LIN; Yu-Chu ; et al.	2022-05-26
Memory device and manufacturing method thereof Grant 11,282,931 - Lin , et al. March 22, 2	2022-03-22
Semiconductor device Grant 11,257,963 - Lin , et al. February 22, 2	2022-02-22
Flash Memory Device Including A Buried Floating Gate And A Buried Erase Gate And Methods Of Forming The Same App 20220028993 - Lin; Yu-Chu ; et al.	2022-01-27
Flash memory device including a buried floating gate and a buried erase gate and methods of forming the same Grant 11,183,572 - Lin , et al. November 23, 2	2021-11-23
Flash Memory Device Including A Buried Floating Gate And A Buried Erase Gate And Methods Of Forming The Same App 20210328034 - LIN; Yu-Chu ; et al.	2021-10-21
Semiconductor Structure And Method For Forming The Same App 20210202737 - PAN; Chia-Ming ; et al.	2021-07-01
Memory Device And Manufacturing Method Thereof App 20210036118 - LIN; Yu-Chu ; et al.	2021-02-04
Semiconductor Device App 20200152648 - Liu; Chien-Hsuan ; et al.	2020-05-14
Non-volatile memory having an erase gate formed between two floating gates with two word lines formed on other sides and a method for forming the same Grant 10,535,670 - Liu , et al. Ja	2020-01-14
Gate structure with multiple spacers Grant 10,103,235 - Pan , et al. October 16, 2	2018-10-16
Manufacturing Method Of Non-volatile Memory And Non-volatile Memory App 20170250188 - Liu; Chien-Hsuan ; et al.	2017-08-31
Gate Structure With Multiple Spacers App 20170243946 - PAN; Chia-Ming ; et al.	2017-08-24
Semiconductor structure and fabricating method thereof Grant 9,728,543 - Pan , et al. August 8, 2	2017-08-08
Gate structure with multiple spacer and method for manufacturing the same Grant 9,653,302 - Pan , et al. May 16, 2	2017-05-16
Gate Structure With Multiple Spacer And Method For Manufacturing The Same App 20170032971 - PAN; Chia-Ming ; et al.	2017-02-02

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