Palmour; John

Patent Applications and Registrations

Patent applications and USPTO patent grants for Palmour; John.The latest application filed is for "field effect transistor devices with buried well protection regions".

Company Profile

1.11.9

Palmour; John - Cary NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Field effect transistor devices with buried well protection regions Grant 10,784,338 - Cheng , et al. Sept	2020-09-22
Field Effect Transistor Devices With Buried Well Protection Regions App 20190067414 - Cheng; Lin ; et al.	2019-02-28
Field effect transistor devices with buried well protection regions Grant 10,134,834 - Cheng , et al. November 20, 2	2018-11-20
Field Effect Transistor Devices with Buried Well Protection Regions App 20170092715 - Cheng; Lin ; et al.	2017-03-30
Field effect transistor devices with buried well protection regions Grant 9,570,585 - Cheng , et al. February 14, 2	2017-02-14
Field effect transistor devices with protective regions Grant 9,306,061 - Cheng , et al. April 5, 2	2016-04-05
Field effect transistor devices with buried well regions and epitaxial layers Grant 9,240,476 - Pala , et al. January 19, 2	2016-01-19
Field Effect Transistor Devices with Buried Well Protection Regions App 20160005837 - Cheng; Lin ; et al.	2016-01-07
Field effect transistor devices with buried well protection regions Grant 9,142,668 - Cheng , et al. September 22, 2	2015-09-22
Field effect transistor devices with low source resistance Grant 9,142,662 - Ryu , et al. September 22, 2	2015-09-22
Field effect transistor devices with low source resistance Grant 9,029,945 - Ryu , et al. May 12, 2	2015-05-12
Field effect transistor devices with regrown p-layers Grant 9,012,984 - Cheng , et al. April 21, 2	2015-04-21
Field Effect Transistor Devices with Buried Well Regions and Epitaxial Layers App 20140264579 - Pala; Vipindas ; et al.	2014-09-18
Field Effect Transistor Devices with Protective Regions App 20140264563 - Cheng; Lin ; et al.	2014-09-18
Field Effect Transistor Devices with Buried Well Protection Regions App 20140264564 - Cheng; Lin ; et al.	2014-09-18
Field Effect Transistor Devices with Regrown P-Layers App 20140264562 - Cheng; Lin ; et al.	2014-09-18
Field Effect Transistor Devices with Low Source Resistance App 20120280252 - Ryu; Sei-Hyung ; et al.	2012-11-08
Field Effect Transistor Devices with Low Source Resistance App 20120280270 - Ryu; Sei-Hyung ; et al.	2012-11-08

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.