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Patent applications and USPTO patent grants for Palmer; Wyn Terence.The latest application filed is for "symmetry corrected high frequency digital divider".
Patent | Date |
---|---|
Exact frequency translation using dual cascaded sigma-delta modulator controlled phase lock loops Grant 7,924,072 - Palmer , et al. April 12, 2 | 2011-04-12 |
Symmetry corrected high frequency digital divider Grant 7,924,966 - Palmer , et al. April 12, 2 | 2011-04-12 |
Multiple input PLL with hitless switchover between non-integer related input frequencies Grant 7,893,736 - Palmer , et al. February 22, 2 | 2011-02-22 |
Symmetry Corrected High Frequency Digital Divider App 20100128836 - PALMER; Wyn Terence ;   et al. | 2010-05-27 |
Multiple Input Pll With Hitless Switchover Between Non-integer Related Input Frequencies App 20100123496 - PALMER; Wyn Terence ;   et al. | 2010-05-20 |
Digital Pll With Known Noise Source And Known Loop Bandwidth App 20100123488 - PALMER; Wyn Terence ;   et al. | 2010-05-20 |
Exact Frequency Translation Using Dual Cascaded Sigma-delta Modulator Controlled Phase Lock Loops App 20100123491 - Palmer; Wyn Terence ;   et al. | 2010-05-20 |
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