loadpatents
name:-0.0093128681182861
name:-0.0056030750274658
name:-0.0058929920196533
PALANGAPPA; Poovaiah M. Patent Filings

PALANGAPPA; Poovaiah M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for PALANGAPPA; Poovaiah M..The latest application filed is for "techniques to improve latency of retry flow in memory controllers".

Company Profile
5.5.7
  • PALANGAPPA; Poovaiah M. - San Jose CA
  • Palangappa; Poovaiah M - San Jose CA
  • Palangappa; Poovaiah M. - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Techniques To Improve Latency Of Retry Flow In Memory Controllers
App 20220209794 - PALANGAPPA; Poovaiah M. ;   et al.
2022-06-30
Techniques to use intrinsic information for a bit-flipping error correction control decoder
Grant 11,146,289 - Bhatia , et al. October 12, 2
2021-10-12
Low density parity check (LDPC) decoder architecture with check node storage (CNS) or bounded circulant
Grant 11,088,707 - Palangappa , et al. August 10, 2
2021-08-10
Compressing error vectors for decoding logic to store compressed in a decoder memory used by the decoding logic
Grant 11,063,607 - Palangappa , et al. July 13, 2
2021-07-13
Die-wise residual bit error rate (RBER) estimation for memories
Grant 10,707,901 - Palangappa , et al.
2020-07-07
Low Density Parity Check (ldpc) Decoder Architecture With Check Node Storage (cns) Or Bounded Circulant
App 20190326930 - PALANGAPPA; Poovaiah M. ;   et al.
2019-10-24
Compressing Error Vectors For Decoding Logic To Store Compressed In A Decoder Memory Used By The Decoding Logic
App 20190280715 - PALANGAPPA; Poovaiah M. ;   et al.
2019-09-12
Devices, systems, and methods having high data deduplication and low read latencies
Grant 10,372,620 - Palangappa
2019-08-06
Techniques To Use Intrinsic Information For A Bit-flipping Error Correction Control Decoder
App 20190238158 - BHATIA; Aman ;   et al.
2019-08-01
Die-wise Residual Bit Error Rate (rber) Estimation For Memories
App 20190140660 - PALANGAPPA; Poovaiah M. ;   et al.
2019-05-09
Devices, Systems, And Methods Having High Data Deduplication And Low Read Latencies
App 20180188971 - Palangappa; Poovaiah M.
2018-07-05
Memory circuit defect correction
App 20170186500 - Motwani; Ravi H. ;   et al.
2017-06-29

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