Pakbaz; Faraydon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Pakbaz; Faraydon.The latest application filed is for "tamper detection for a chip package".

Company Profile

2.13.15

Pakbaz; Faraydon - Milton VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Tamper detection for a chip package Grant 10,651,135 - Graf , et al.	2020-05-12
Tamper Detection For A Chip Package App 20170373024 - Graf; Richard S. ; et al.	2017-12-28
Real-time adaptive voltage control of logic blocks Grant 8,988,140 - Graf , et al. March 24, 2	2015-03-24
Real-time Adaptive Voltage Control Of Logic Blocks App 20150002217 - Graf; Richard S. ; et al.	2015-01-01
Integrated circuit chip incorporating embedded thermal radiators for localized, on-demand, heating and a system and method for designing such an integrated circuit chip Grant 8,756,549 - Graf , et al. June 17, 2	2014-06-17
Input jitter filter for a phase-locked loop (PLL) Grant 8,648,634 - Kelkar , et al. February 11, 2	2014-02-11
Asynchronous circuit with an at-speed built-in self-test (BIST) architecture Grant 8,612,815 - Pakbaz , et al. December 17, 2	2013-12-17
Input Jitter Filter For A Phase-locked Loop (pll) App 20130300469 - KELKAR; Ram ; et al.	2013-11-14
Asynchronous Circuit With An At-speed Built-in Self-test (bist) Architecture App 20130159803 - Pakbaz; Faraydon ; et al.	2013-06-20
Integrated Circuit Chip Incorporating Embedded Thermal Radiators For Localized, On-demand, Heating And A System And Method For Designing Such An Integrated Circuit Chip App 20120168416 - Graf; Richard S. ; et al.	2012-07-05
Circuit and method for asynchronous pipeline processing with variable request signal delay Grant 8,188,765 - Ouellette , et al. May 29, 2	2012-05-29
Circuit And Method For Asynchronous Pipeline Processing With Variable Request Signal Delay App 20120062300 - Ouellette; Michael R. ; et al.	2012-03-15
Method, apparatus and computer program product for controlling jitter or the effects of jitter in integrated circuitry Grant 7,603,639 - Pakbaz , et al. October 13, 2	2009-10-13
Method and apparatus to target pre-determined spatially varying voltage variation across the area of the VLSI power distribution system using frequency domain analysis Grant 7,533,357 - Carlsen , et al. May 12, 2	2009-05-12
Method For Simultaneous Circuit Board And Integrated Circuit Switching Noise Analysis And Mitigation App 20090112558 - Garofano; Umberto ; et al.	2009-04-30
Method, Apparatus And Computer Program Product For Controlling Jitter Or The Effects Of Jitter In Integrated Circuitry App 20080250367 - Pakbaz; Faraydon ; et al.	2008-10-09
A Method And Apparatus To Target Pre-Determined Spatially Varying Voltage Variation Across The Area Of The VLSI Power Distribution System Using Frequency Domain Analysis App 20070283299 - Carlsen; Kurt A ; et al.	2007-12-06
Performance Measurement Of Device Dedicated To Phase Locked Loop Using Second Order System Approximation App 20060186871 - Pakbaz; Faraydon ; et al.	2006-08-24
Method Of Modeling A Portion Of An Electrical Circuit Using A Pole-zero Approximation Of An S-parameter Transfer Function Of The Circuit Portion App 20060190229 - Pakbaz; Faraydon ; et al.	2006-08-24
Performance measurement of device dedicated to phase locked loop using second order system approximation Grant 7,084,615 - Pakbaz , et al. August 1, 2	2006-08-01
Method of assigning chip I/O's to package channels Grant 6,662,352 - Nsame , et al. December 9, 2	2003-12-09
Method of assigning chip I/O's to package channels App 20030061589 - Nsame, Pascal A. ; et al.	2003-03-27

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