Paek; Seung Weon

Patent Applications and Registrations

Patent applications and USPTO patent grants for Paek; Seung Weon.The latest application filed is for "methods of fabricating semiconductor devices, and related layout design systems".

Company Profile

1.5.6

Paek; Seung Weon - Yongin-si KR
Paek; Seung-Weon - Kyoungki-do KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Methods of fabricating semiconductor devices, and related layout design systems Grant 10,867,111 - Kim , et al. December 15, 2	2020-12-15
Methods Of Fabricating Semiconductor Devices, And Related Layout Design Systems App 20200159884 - Kim; Jae Hwan ; et al.	2020-05-21
Methods for designing a layout of a semiconductor device including at least one risk via Grant 9,904,753 - Kim , et al. February 27, 2	2018-02-27
Layout design system, method, and semiconductor device employing termination-free unit designs Grant 9,633,161 - Baek , et al. April 25, 2	2017-04-25
Methods For Designing A Layout Of A Semiconductor Device Including At Least One Risk Via App 20160283634 - KIM; Byung-Moo ; et al.	2016-09-29
Layout Design System, Layout Design Method, And Semiconductor Device Fabricated By Using The Same App 20150137252 - Baek; Sang-Hoon ; et al.	2015-05-21
Method for forming ultra fine contact holes in semiconductor devices Grant 7,001,710 - Choi , et al. February 21, 2	2006-02-21
Method for forming ultra fine contact holes in semiconductor devices App 20040072104 - Choi, Sang-Tae ; et al.	2004-04-15

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