loadpatents
name:-0.0024487972259521
name:-0.012969017028809
name:-0.00044012069702148
PACT GmbH Patent Filings

PACT GmbH

Patent Applications and Registrations

Patent applications and USPTO patent grants for PACT GmbH.The latest application filed is for "process for automatic dynamic reloading of data flow processors (dfps) and units with two- or three-dimensional programmable cell architectures (fpgas, dpgas, and the like)".

Company Profile
0.11.1
  • PACT GmbH - Munchen DE
  • PACT GmbH - Munich DE
  • Pact GmbH - Karlsruhe DE
  • PACT GmbH - DE DE
  • PACT GmbH - Karlsruher DE
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Process for automatic dynamic reloading of data flow processors (DFPS) and units with two- or three-dimensional programmable cell architectures (FPGAS, DPGAS, and the like)
App 20030093662 - Vorbach, Martin ;   et al.
2003-05-15
Method of self-synchronization of configurable elements of a programmable module
Grant 6,542,998 - Vorbach , et al. April 1, 2
2003-04-01
Method of self-synchronization of configurable elements of a programmable unit
Grant 6,526,520 - Vorbach , et al. February 25, 2
2003-02-25
Process for automatic dynamic reloading of data flow processors (dfps) and units with two-or-three-dimensional programmable cell architectures (fpgas, dpgas, and the like)
Grant 6,477,643 - Vorbach , et al. November 5, 2
2002-11-05
Unit For Processing Numeric And Logic Operations For Use In Central Processing Units (cpus), Multiprocessor Systems, Data-flow Processors (dsps), Systolic Processors And Field Programmable Gate Arrays (epgas)
Grant 6,425,068 - Vorbach , et al. July 23, 2
2002-07-23
Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity
Grant 6,405,299 - Vorbach , et al. June 11, 2
2002-06-11
I/O and memory bus system for DFPS and units with two or multi-dimensional programmable cell architectures
Grant 6,338,106 - Vorbach , et al. January 8, 2
2002-01-08
I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures
Grant 6,119,181 - Vorbach , et al. September 12, 2
2000-09-12
Process for automatic dynamic reloading of data flow processors (DFPs) and units with two or three-dimensional programmable cell architectures (FPGAs, DPGAs and the like)
Grant 6,088,795 - Vorbach , et al. July 11, 2
2000-07-11
Method of the self-synchronization of configurable elements of a programmable unit
Grant 6,081,903 - Vorbach , et al. June 27, 2
2000-06-27
Run-time reconfiguration method for programmable units
Grant 6,021,490 - Vorbach , et al. February 1, 2
2000-02-01
Dynamically reconfigurable data processing system
Grant 5,943,242 - Vorbach , et al. August 24, 1
1999-08-24

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