Packan; Paul

Patent Applications and Registrations

Patent applications and USPTO patent grants for Packan; Paul.The latest application filed is for "cmos varactor with increased tuning range".

Company Profile

0.10.7

Packan; Paul - Beaverton OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
CMOS varactor with increased tuning range Grant 11,264,517 - El-Tanani , et al. March 1, 2	2022-03-01
Cmos Varactor With Increased Tuning Range App 20170330977 - EL-TANANI; MOHAMMED ; et al.	2017-11-16
Field effect transistor structure with abrupt source/drain junctions Grant 9,793,373 - Murthy , et al. October 17, 2	2017-10-17
Field Effect Transistor Structure With Abrupt Source/drain Junctions App 20170186855 - Murthy; Anand S. ; et al.	2017-06-29
Field effect transistor structure with abrupt source/drain junctions Grant 9,640,634 - Murthy , et al. May 2, 2	2017-05-02
Field Effect Transistor Structure With Abrupt Source/drain Junctions App 20100133595 - Murthy; Anand S. ; et al.	2010-06-03
Field effect transistor structure with abrupt source/drain junctions Grant 7,682,916 - Murthy , et al. March 23, 2	2010-03-23
High voltage compliant apparatus for semiconductor fabrication process charging protection App 20090323235 - Pae; Sangwoo ; et al.	2009-12-31
Field effect transistor structure with abrupt source/drain junctions App 20090011565 - Murthy; Anand S. ; et al.	2009-01-08
Method of fabricating a field effect transistor structure with abrupt source/drain junctions Grant 7,436,035 - Murthy , et al. October 14, 2	2008-10-14
Method of fabricating a field effect transistor structure with abrupt source/drain junctions Grant 7,338,873 - Murthy , et al. March 4, 2	2008-03-04
Method of fabricating a field effect transistor structure with abrupt source/drain junctions App 20060220153 - Murthy; Anand S. ; et al.	2006-10-05
Method of fabricating a field effect transistor structure with abrupt source/drain junctions Grant 6,887,762 - Murthy , et al. May 3, 2	2005-05-03
Method of fabricating a field effect transistor structure with abrupt source/drain junctions App 20050012146 - Murthy, Anand S. ; et al.	2005-01-20
Transistor with minimal junction capacitance and method of fabrication Grant 6,198,142 - Chau , et al. March 6, 2	2001-03-06
Method of forming a transistor Grant 5,908,313 - Chau , et al. June 1, 1	1999-06-01

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