Ozguner; Tolga

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ozguner; Tolga.The latest application filed is for "no miss cache structure for real-time image transformations with multiple lsr processing engines".

Company Profile

10.34.39

Ozguner; Tolga - Redmond WA
Ozguner; Tolga - Rochester MN

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
No miss cache structure for real-time image transformations with multiple LSR processing engines Grant 10,672,368 - Haraden , et al.	2020-06-02
Selectively applying reprojection processing to multi-layer scenes for optimizing late stage reprojection power Grant 10,514,753 - Haraden , et al. Dec	2019-12-24
Selective application of reprojection processing on layer sub-regions for optimizing late stage reprojection power Grant 10,410,349 - Haraden , et al. Sept	2019-09-10
Methods and systems for multistage post-rendering image transformation Grant 10,403,029 - Ozguner , et al. Sep	2019-09-03
Post-rendering image transformation using parallel image transformation pipelines Grant 10,360,832 - Ozguner , et al.	2019-07-23
Reducing negative effects of insufficient data throughput for real-time processing Grant 10,338,816 - Ozguner , et al.	2019-07-02
No Miss Cache Structure for Real-Time Image Transformations with Multiple LSR Processing Engines App 20190189089 - HARADEN; Ryan Scott ; et al.	2019-06-20
No miss cache structure for real-time image transformations with multiple LSR processing engines Grant 10,255,891 - Haraden , et al.	2019-04-09
No miss cache structure for real-time image transformations Grant 10,242,654 - Ozguner , et al.	2019-03-26
No miss cache structure for real-time image transformations with data compression Grant 10,241,470 - Ozguner , et al.	2019-03-26
Post-rendering Image Transformation Using Parallel Image Transformation Pipelines App 20190051229 - OZGUNER; Tolga ; et al.	2019-02-14
Reducing Negative Effects Of Insufficient Data Throughput For Real-time Processing App 20190050149 - OZGUNER; Tolga ; et al.	2019-02-14
Methods And Systems For Multistage Post-rendering Image Transformation App 20180322688 - OZGUNER; Tolga ; et al.	2018-11-08
No Miss Cache Structure for Real-Time Image Transformations with Multiple LSR Processing Engines App 20180301125 - Haraden; Ryan Scott ; et al.	2018-10-18
Reducing negative effects of insufficient data throughput for real-time processing Grant 10,095,408 - Ozguner , et al. October 9, 2	2018-10-09
Selective Application Of Reprojection Processing On Layer Sub-regions For Optimizing Late Stage Reprojection Power App 20180276824 - Haraden; Ryan Scott ; et al.	2018-09-27
Selectively Applying Reprojection Processing To Multi-layer Scenes For Optimizing Late Stage Reprojection Power App 20180275748 - Haraden; Ryan Scott ; et al.	2018-09-27
No Miss Cache Structure for Real-Time Image Transformations with Data Compression App 20180260931 - OZGUNER; Tolga ; et al.	2018-09-13
Reducing Negative Effects Of Insufficent Data Throughput For Real-time Processing App 20180260120 - Ozguner; Tolga ; et al.	2018-09-13
No Miss Cache Structure for Real-Time Image Transformations App 20180211638 - Ozguner; Tolga ; et al.	2018-07-26
No miss cache structure for real-time image transformations with data compression Grant 9,978,118 - Ozguner , et al. May 22, 2	2018-05-22
Interrupt controller Grant 9,747,225 - Ozguner , et al. August 29, 2	2017-08-29
Interrupt Controller App 20160328339 - Ozguner; Tolga ; et al.	2016-11-10
Memory controller to utilize DRAM write buffers Grant 8,219,745 - Bellows , et al. July 10, 2	2012-07-10
Methods and apparatus for indexing memory of a network processor Grant 8,213,428 - Fagerness , et al. July 3, 2	2012-07-03
Implementing pointer and stake model for frame alteration code in a network processor Grant 8,170,024 - Imming , et al. May 1, 2	2012-05-01
Reuse of functional data buffers for pattern buffers in XDR DRAM Grant 7,925,823 - Bellows , et al. April 12, 2	2011-04-12
Memory controller operating in a system with a variable system clock Grant 7,761,682 - Barnum , et al. July 20, 2	2010-07-20
Memory command and address conversion between an XDR interface and a double data rate interface Grant 7,757,040 - Bellows , et al. July 13, 2	2010-07-13
Implementing conditional packet alterations based on transmit port Grant 7,757,006 - Imming , et al. July 13, 2	2010-07-13
Managing write-to-read turnarounds in an early read after write memory system Grant 7,752,379 - Bellows , et al. July 6, 2	2010-07-06
Optimizing data bandwidth across a variable asynchronous clock domain Grant 7,669,028 - Bellows , et al. February 23, 2	2010-02-23
Implementing Conditional Packet Alterations Based On Transmit Port App 20090144452 - Imming; Kerry Christopher ; et al.	2009-06-04
Managing Write-to-Read Turnarounds in an Early Read After Write Memory System App 20090119442 - Bellows; Mark David ; et al.	2009-05-07
Managing write-to-read turnarounds in an early read after write memory system Grant 7,487,318 - Bellows , et al. February 3, 2	2009-02-03
Implementing conditional packet alterations based on transmit port Grant 7,475,161 - Imming , et al. January 6, 2	2009-01-06
Memory controller operating in a system with a variable system clock Grant 7,467,277 - Barnum , et al. December 16, 2	2008-12-16
Memory Controller Operating In A System With A Variable System Clock App 20080307184 - Barnum; Melissa Ann ; et al.	2008-12-11
Memory Command and Address Conversion Between an XDR Interface and a Double Data Rate Interface App 20080183925 - Bellows; Mark D. ; et al.	2008-07-31
Using Extreme Data Rate Memory Commands to Scrub and Refresh Double Data Rate Memory App 20080183916 - Bellows; Mark David ; et al.	2008-07-31
Methods and Apparatus for Software Control of a Non-Functional Operation on Memory App 20080168262 - Bellows; Mark David ; et al.	2008-07-10
Methods and Apparatus for Calibrating Heterogeneous Memory Interfaces App 20080168298 - Bellows; Mark David ; et al.	2008-07-10
Methods and Apparatus for Interfacing a Processor and a Memory App 20080168206 - Bellows; Mark David ; et al.	2008-07-10
Reuse of functional data buffers for pattern buffers in XDR DRAM Grant 7,380,052 - Bellows , et al. May 27, 2	2008-05-27
Method, Apparatus, And Computer Program Product For Implementing Pointer And Stake Model For Frame Alteration Code In A Network Processor App 20080063009 - Imming; Kerry Christopher ; et al.	2008-03-13
Method and Apparatus for Managing Write-to-Read Turnarounds in an Early Read After Write Memory System App 20080046632 - Bellows; Mark David ; et al.	2008-02-21
Reuse of Functional Data Buffers for Pattern Buffers in XDR DRAM App 20080040534 - Bellows; Mark David ; et al.	2008-02-14
Method, apparatus, and computer program product for implementing pointer and stake model for frame alteration code in a network processor Grant 7,330,478 - Imming , et al. February 12, 2	2008-02-12
Method and apparatus for managing write-to-read turnarounds in an early read after write memory system Grant 7,321,950 - Bellows , et al. January 22, 2	2008-01-22
Method and apparatus for guaranteeing memory bandwidth for trace data App 20070220361 - Barnum; Melissa A. ; et al.	2007-09-20
Memory controller operating in a system with a variable system clock App 20070183192 - Barnum; Melissa Ann ; et al.	2007-08-09
Optimizing data bandwidth across a variable asynchronous clock domain App 20070186071 - Bellows; Mark D. ; et al.	2007-08-09
Method and apparatus for implementing alterations on multiple concurrent frames Grant 7,239,635 - Ozguner July 3, 2	2007-07-03
Methods and apparatus for memory calibration Grant 7,225,097 - Ganfield , et al. May 29, 2	2007-05-29
Method and apparatus for implementing frame header alterations using byte-wise arithmetic logic units Grant 7,224,701 - Ozguner May 29, 2	2007-05-29
Method and apparatus for implementing frame header alterations Grant 7,218,647 - Ozguner May 15, 2	2007-05-15
Methods and apparatus for memory calibration App 20070027650 - Ganfield; Paul A. ; et al.	2007-02-01
Method and apparatus for managing write-to-read turnarounds in an early read after write memory system App 20060174082 - Bellows; Mark David ; et al.	2006-08-03
Reuse of functional data buffers for pattern buffers in XDR DRAM App 20060129754 - Bellows; Mark David ; et al.	2006-06-15
Memory controller to utilize DRAM write buffers App 20060123187 - Bellows; Mark David ; et al.	2006-06-08
Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus Grant 6,996,650 - Calvignac , et al. February 7, 2	2006-02-07
Chip to chip interface for interconnecting chips Grant 6,910,092 - Calvignac , et al. June 21, 2	2005-06-21
Method and apparatus for implementing chip-to-chip interconnect bus initialization Grant 6,880,026 - Imming , et al. April 12, 2	2005-04-12
Method, apparatus, and computer program product for implementing pointer and stake model for frame alteration code in a network processor App 20050063415 - Imming, Kerry Christopher ; et al.	2005-03-24
Method, apparatus and computer program product for implementing conditional packet alterations based on transmit port App 20050055462 - Imming, Kerry Christopher ; et al.	2005-03-10
Methods and apparatus for indexing memory of a network processor App 20050018684 - Fagerness, Gerald G. ; et al.	2005-01-27
Method and apparatus for implementing frame header alterations using byte-wise arithmetic logic units App 20040001486 - Ozguner, Tolga	2004-01-01
Method and apparatus for implementing frame header alterations App 20040003110 - Ozguner, Tolga	2004-01-01
Method and apparatus for implementing alterations on multiple concurrent frames App 20040001484 - Ozguner, Tolga	2004-01-01
Method and apparatus for implementing chip-to-chip interconnect bus initialization App 20030217213 - Imming, Kerry Christopher ; et al.	2003-11-20
Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus App 20030217214 - Calvignac, Jean ; et al.	2003-11-20
Chip to chip interface for interconnecting chips App 20030110339 - Calvignac, Jean Louis ; et al.	2003-06-12

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