Owens; Alexander H.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Owens; Alexander H..The latest application filed is for "method for improved mobility using hybrid orientaion technology (hot) in conjunction with".

Company Profile

0.12.3

Owens; Alexander H. - Los Gatos CA
Owens; Alexander H. - Santa Clara CA
Owens; Alexander H. - Pennington NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for improved mobility using hybrid orientation technology (HOT) in conjunction with selective epitaxy and related apparatus Grant 8,765,534 - Owens July 1, 2	2014-07-01
Method for improved mobility using hybrid orientaion technology (HOT) in conjunction with App 20130157424 - Owens; Alexander H.	2013-06-20
Method for using hybrid orientation technology (HOT) in conjunction with selective epitaxy to form semiconductor devices with regions of different electron and hole mobilities and related apparatus Grant 8,395,216 - Owens March 12, 2	2013-03-12
Method for improved mobility using hybrid orientation technology (HOT) in conjunction with selective epitaxy and related apparatus App 20110089473 - Owens; Alexander H.	2011-04-21
Electrical die contact structure and fabrication method Grant 7,795,126 - Prabhu , et al. September 14, 2	2010-09-14
Electrical Die Contact Structure And Fabrication Method App 20080102604 - Prabhu; Ashok ; et al.	2008-05-01
Electrical die contact structure and fabrication method Grant 7,340,181 - Prabhu , et al. March 4, 2	2008-03-04
LDMOS transistor structure for improving hot carrier reliability Grant 6,946,706 - Brisbin , et al. September 20, 2	2005-09-20
High density CMOS integrated circuit with heat transfer structure for improved cooling Grant 5,621,616 - Owens , et al. April 15, 1	1997-04-15
Multilevel gate array integrated circuit structure with perpendicular access to all active device regions Grant 5,612,552 - Owens March 18, 1	1997-03-18
High-temperature bias anneal of integrated circuits for improved radiation hardness and hot electron resistance Grant 5,516,731 - Toutounchi , et al. May 14, 1	1996-05-14
Method for making a vertical power DMOS transistor with small signal bipolar transistors Grant 4,914,051 - Huie , et al. April 3, 1	1990-04-03
Memory device with interconnected polysilicon layers and method for making Grant 4,774,202 - Pan , et al. September 27, 1	1988-09-27
Method for double doping sources and drains in an EPROM Grant 4,590,665 - Owens , et al. May 27, 1	1986-05-27

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