Ovard; David

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ovard; David.The latest application filed is for "memory module with configurable input/output ports".

Company Profile

0.12.12

Ovard; David - Meridian ID US
Ovard, David - Maridian ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory module with configurable input/output ports Grant 8,364,856 - Lee , et al. January 29, 2	2013-01-29
Memory Module With Configurable Input/output Ports App 20120198201 - LEE; Terry R. ; et al.	2012-08-02
Memory module with configurable input/output ports Grant 8,171,181 - Lee , et al. May 1, 2	2012-05-01
Method and system for generating reference voltages for signal receivers Grant 7,746,959 - Keeth , et al. June 29, 2	2010-06-29
Memory Module With Configurable Input/output Ports App 20090276545 - Lee; Terry R. ; et al.	2009-11-05
Method and system for generating reference voltages for signal receivers Grant 7,577,212 - Keeth , et al. August 18, 2	2009-08-18
De-emphasis System And Method For Coupling Digital Signals Through Capacitively Loaded Lines App 20090184745 - Greeff; Roy ; et al.	2009-07-23
De-emphasis system and method for coupling digital signals through capacitively loaded lines Grant 7,514,979 - Greeff , et al. April 7, 2	2009-04-07
System and method for reducing jitter of signals coupled through adjacent signal lines Grant 7,424,634 - Greeff , et al. September 9, 2	2008-09-09
De-emphasis System And Method For Coupling Digital Signals Through Capacitively Loaded Lines App 20080204108 - Greeff; Roy ; et al.	2008-08-28
De-emphasis system and method for coupling digital signals through capacitively loaded lines Grant 7,375,573 - Greeff , et al. May 20, 2	2008-05-20
De-emphasis system and method for coupling digital signals through capacitively loaded lines App 20070273425 - Greeff; Roy ; et al.	2007-11-29
System and method for reducing jitter of signals coupled through adjacent signal lines App 20060224342 - Greeff; Roy ; et al.	2006-10-05
Method and system for generating reference voltages for signal receivers App 20060203938 - Keeth; Brent ; et al.	2006-09-14
Method and system for generating reference voltages for signal receivers App 20060045206 - Keeth; Brent ; et al.	2006-03-02
High speed interface with looped bus App 20050235090 - Lee, Terry R. ; et al.	2005-10-20
High speed interface with looped bus Grant 6,934,785 - Lee , et al. August 23, 2	2005-08-23
Memory repeater Grant 6,882,082 - Greeff , et al. April 19, 2	2005-04-19
Data transmission circuit for memory subsystem, has switching circuit that selectively connects or disconnects two data bus segments to respectively enable data transmission or I/O circuit connection Grant 6,871,253 - Greeff , et al. March 22, 2	2005-03-22
Memory repeater App 20040225777 - Greeff, Roy ; et al.	2004-11-11
High speed interface with looped bus App 20040225770 - Lee, Terry R. ; et al.	2004-11-11
Method and apparatus using switches for point to point bus operation App 20020083255 - Greeff, Roy ; et al.	2002-06-27
Interrogators, Wireless Communication Systems, Methods Of Operating An Interrogator, Methods Of Monitoring Movement Of A Radio Frequency Identification Device, Methods Of Monitoring Movement Of A Remote Communication Device And Movement Monitoring Methods Grant 6,356,230 - Greef , et al. March 12, 2	2002-03-12

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.