Ou; Tsong-Hua

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ou; Tsong-Hua.The latest application filed is for "methods for integrated circuit design and fabrication".

Company Profile

5.51.44

Ou; Tsong-Hua - Taipei TW
Ou; Tsong-Hua - Taipei City TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of cutting conductive patterns Grant 11,429,028 - Hsu , et al. August 30, 2	2022-08-30
Methods for Integrated Circuit Design and Fabrication App 20210175081 - Ou; Tsong-Hua ; et al.	2021-06-10
Methods for integrated circuit design and fabrication Grant 10,930,505 - Ou , et al. February 23, 2	2021-02-23
Method Of Cutting Conductive Patterns App 20200081348 - Hsu; Chin-Hsiung ; et al.	2020-03-12
Method of cutting conductive patterns Grant 10,509,322 - Hsu , et al. Dec	2019-12-17
Methods for Integrated Circuit Design and Fabrication App 20190371606 - Ou; Tsong-Hua ; et al.	2019-12-05
Methods for integrated circuit design and fabrication Grant 10,410,863 - Ou , et al. Sept	2019-09-10
Methods for Integrated Circuit Design and Fabrication App 20180138042 - Ou; Tsong-Hua ; et al.	2018-05-17
Methods for integrated circuit design and fabrication Grant 9,852,908 - Ou , et al. December 26, 2	2017-12-26
Designed-based interconnect structure in semiconductor structure Grant 9,754,881 - Chen , et al. September 5, 2	2017-09-05
Semiconductor device with self-aligned interconnects Grant 9,627,310 - Chang , et al. April 18, 2	2017-04-18
Multiple edge enabled patterning Grant 9,524,939 - Shieh , et al. December 20, 2	2016-12-20
Method Of Cutting Conductive Patterns App 20160320706 - HSU; Chin-Hsiung ; et al.	2016-11-03
Adaptive fin design for FinFETs Grant 9,478,540 - Ou , et al. October 25, 2	2016-10-25
Methods For Integrated Circuit Design And Fabrication App 20160293422 - Ou; Tsong-Hua ; et al.	2016-10-06
Method of determining whether a layout is colorable Grant 9,390,223 - Cheng , et al. July 12, 2	2016-07-12
Multiple Edge Enabled Patterning App 20160190070 - Shieh; Ming-Feng ; et al.	2016-06-30
Method of cutting conductive patterns Grant 9,380,709 - Hsu , et al. June 28, 2	2016-06-28
Designed-based Interconnect Structure In Semiconductor Structure App 20160172297 - CHEN; Chih-Liang ; et al.	2016-06-16
Methods for integrated circuit design and fabrication Grant 9,362,119 - Ou , et al. June 7, 2	2016-06-07
Multiple edge enabled patterning Grant 9,287,125 - Shieh , et al. March 15, 2	2016-03-15
Designed-based interconnect structure in semiconductor structure Grant 9,281,273 - Chen , et al. March 8, 2	2016-03-08
Designed-based Interconnect Structure In Semiconductor Structure App 20160064322 - CHEN; Chih-Liang ; et al.	2016-03-03
Layout method and system for multi-patterning integrated circuits Grant 9,262,577 - Chen , et al. February 16, 2	2016-02-16
Method Of Determining Whether A Layout Is Colorable App 20160019333 - CHENG; Wen-Li ; et al.	2016-01-21
System and method for decomposition of a single photoresist mask pattern into 3 photoresist mask patterns Grant 9,176,373 - Cheng , et al. November 3, 2	2015-11-03
Methods for Integrated Circuit Design and Fabrication App 20150311063 - Ou; Tsong-Hua ; et al.	2015-10-29
Method of defining an intensity selective exposure photomask Grant 9,026,957 - Liu , et al. May 5, 2	2015-05-05
Multi-patterning conflict free integrated circuit design Grant 9,026,971 - Ho , et al. May 5, 2	2015-05-05
System And Method For Decomposition Of A Single Photoresist Mask Pattern Into 3 Photoresist Mask Patterns App 20150040083 - CHENG; Wen-Li ; et al.	2015-02-05
Semiconductor device with self-aligned interconnects and blocking portions Grant 8,907,497 - Chang , et al. December 9, 2	2014-12-09
Method Of Cutting Conductive Patterns App 20140259658 - HSU; Chin-Hsiung ; et al.	2014-09-18
Multiple Edge Enabled Patterning App 20140252559 - Shieh; Ming-Feng ; et al.	2014-09-11
Layout Method And System For Multi-patterning Integrated Circuits App 20140237435 - CHEN; Huang-Yu ; et al.	2014-08-21
Distinguishable IC patterns with encoded information Grant 8,806,392 - Chang , et al. August 12, 2	2014-08-12
Customized patterning modulation and optimization Grant 8,806,386 - Cheng , et al. August 12, 2	2014-08-12
Adaptive Fin Design for FinFETs App 20140203378 - Ou; Tsong-Hua ; et al.	2014-07-24
Method Of Defining An Intensity Selective Exposure Photomask App 20140170537 - Liu; George ; et al.	2014-06-19
Distinguishable IC Patterns with Encoded Information App 20140157212 - Chang; Shih-Ming ; et al.	2014-06-05
Practical approach to layout migration Grant 8,745,554 - Cheng , et al. June 3, 2	2014-06-03
Layout method and system for multi-patterning integrated circuits Grant 8,745,556 - Chen , et al. June 3, 2	2014-06-03
Multiple edge enabled patterning Grant 8,730,473 - Shieh , et al. May 20, 2	2014-05-20
Adaptive fin design for FinFETs Grant 8,728,892 - Ou , et al. May 20, 2	2014-05-20
Double patterning methodology Grant 8,683,392 - Hsieh , et al. March 25, 2	2014-03-25
Intensity selective exposure photomask Grant 8,673,520 - Liu , et al. March 18, 2	2014-03-18
Layout Method And System For Multi-patterning Integrated Circuits App 20140007026 - CHEN; Huang-Yu ; et al.	2014-01-02
Semiconductor Device With Self-Aligned Interconnects and Blocking Portions App 20130285246 - Chang; Shih-Ming ; et al.	2013-10-31
Semiconductor Device with Self-Aligned Interconnects App 20130270704 - Chang; Shih-Ming ; et al.	2013-10-17
Dissection Splitting With Optical Proximity Correction To Reduce Corner Rounding App 20130246981 - Chiang; Chia-Ping ; et al.	2013-09-19
Dissection splitting with optical proximity correction to reduce corner rounding Grant 8,527,916 - Chiang , et al. September 3, 2	2013-09-03
Target-based thermal design using dummy insertion for semiconductor devices Grant 8,527,918 - Cheng , et al. September 3, 2	2013-09-03
Intensity selective exposure photomask Grant 8,431,291 - Liu , et al. April 30, 2	2013-04-30
Target-based Dummy Insertion For Semiconductor Devices App 20130061196 - Cheng; Ying-Chou ; et al.	2013-03-07
Method, system, and apparatus for adjusting local and global pattern density of an integrated circuit design Grant 8,372,742 - Cheng , et al. February 12, 2	2013-02-12
Double Patterning Methodology App 20130024822 - Hsieh; Ken-Hsien ; et al.	2013-01-24
Parameterized dummy cell insertion for process enhancement Grant 8,332,797 - Cheng , et al. December 11, 2	2012-12-11
Adaptive Fin Design for FinFETs App 20120280331 - Ou; Tsong-Hua ; et al.	2012-11-08
Method of thermal density optimization for device and process enhancement Grant 8,219,951 - Cheng , et al. July 10, 2	2012-07-10
Double patterning technology using single-patterning-spacer-technique Grant 8,211,807 - Chen , et al. July 3, 2	2012-07-03
Table-based DFM for accurate post-layout analysis Grant 8,201,111 - Hou , et al. June 12, 2	2012-06-12
Parameterized Dummy Cell Insertion For Process Enhancement App 20120144361 - Cheng; Ying-Chou ; et al.	2012-06-07
Double Patterning Technology Using Single-Patterning-Spacer-Technique App 20120091592 - Chen; Huang-Yu ; et al.	2012-04-19
Multiple Edge Enabled Patterning App 20120074400 - Shieh; Ming-Feng ; et al.	2012-03-29
Intensity Selective Exposure Photomask App 20120040278 - Liu; George ; et al.	2012-02-16
Table-Based DFM for Accurate Post-Layout Analysis App 20110289466 - Hou; Yung-Chin ; et al.	2011-11-24
Method for shape and timing equivalent dimension extraction Grant 8,037,575 - Cheng , et al. October 18, 2	2011-10-18
Intensity Selective Exposure Photomask App 20110217630 - Liu; George ; et al.	2011-09-08
Method Of Thermal Density Optimization For Device And Process Enhancement App 20110214101 - Cheng; Ying-Chou ; et al.	2011-09-01
Method, System, And Apparatus For Adjusting Local And Global Pattern Density Of An Integrated Circuit Design App 20110204470 - Cheng; Ying-Chou ; et al.	2011-08-25
Table-based DFM for accurate post-layout analysis Grant 8,001,494 - Hou , et al. August 16, 2	2011-08-16
Practical Approach to Layout Migration App 20110161907 - Cheng; Ying-Chou ; et al.	2011-06-30
Customized Patterning Modulation And Optimization App 20110124193 - Cheng; Ying-Chou ; et al.	2011-05-26
Electrical parameter extraction for integrated circuit design Grant 7,783,999 - Ou , et al. August 24, 2	2010-08-24
Table-based Dfm For Accurate Post-layout Analysis App 20100095253 - HOU; Yung-Chin ; et al.	2010-04-15
Method For Shape And Timing Equivalent Dimension Extraction App 20090222785 - CHENG; Ying-Chou ; et al.	2009-09-03
Electrical Parameter Extraction for Integrated Circuit Design App 20090187866 - Ou; Tsong-Hua ; et al.	2009-07-23